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检索条件"主题词=Programmable Logic Arrays"

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Hardware and software prototyping for application-specific real-time systems

Hardware and software prototyping for application-specific r...

引用

International Workshop on Rapid System Prototyping (RSP)

作者： M.B. Srivastava J.S. Sun R.W. Brodersen EECS Department University of California Berkeley CA USA

Dedicated systems with hardware and software tailored for the application provide tremendous performance improvements over systems based on general-purpose hardware. The authors describe SIERA, a system being developed for rapid-prototyping of the hardware and software components of such dedicated real-time systems starting from a high-level description. Based on their experience of automated generation at the chip level which they developed with the LAGER system, they identify two distinct phases in the design process. The first is the process of mapping the high-level system specification to a set of interacting hardware and software modules. The second is the generation of these software and hardware modules. A mix of mapping, synthesis and library based techniques is being utilized to accomplish these tasks.< >

关键词： Hardware Software prototyping Real time systems Application software Integrated circuit interconnections Protocols Data processing Robot control programmable logic arrays Databases

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Handling of Transmission of Numeral Signals of Telecommunication by Means of Programmed logical Integrated Circuits

Handling of Transmission of Numeral Signals of Telecommunica...

引用

International Conference on Information Science and Communications Technologies (ICISCT)

作者： Masharipov Otaboy Juraev Tuychi Urgench Branch of Tashkent University of Information Technologies named after Muhammad Al-Khwarizmi Urgench Uzbekistan Karshi State University Karshi Uzbekistan

In article, it is stated principles of creation of programmed logical integrated circuits and digital signal processing methods. Are resulted on a specific example process of formation code sequence the meaning code o... 详细信息

ISBN: (数字)9781728125640

ISBN: (纸本)9781728125657

关键词： programmable logic arrays Switches Table lookup Splines (mathematics) Field programmable gate arrays DH-HEMTs

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The observation of self-channeling of a relativistically-intense laser pulse in an underdense plasma

The observation of self-channeling of a relativistically-int...

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IEEE Photonics Conference (IPC)

作者： C.E. Clayton P. Muggli D. Gordon K.C. Tzeng W.B. Mori C. Joshi A. Modena Z. Najmudin A.E. Dangor V. Malka D. Neely University of California Los Angeles USA Imperial College London UK Ecole Polytechnique Canada Rutherford and Appleton Laboratory UK

Four spatial/spectral imaging diagnostics show relativistic self-channeling of a 25 TW, 1 ps laser pulse limited only by the length of the gas-jet target. Collective scattering of a probe beam provides a spectrally-resolved image of large-amplitude plasma waves indicating an intensity >10/sup 18/ W/cm/sup 2/ at 4 mm from the laser focus.

关键词： Optical pulses programmable logic arrays Electrons Gas lasers X-ray lasers Plasma density Plasma diagnostics Optical imaging Optical scattering Laser fusion

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Bounds on the Saved Area Ratio Due to PLA Folding 83

Bounds on the Saved Area Ratio Due to PLA Folding

引用

Design Automation Conference

作者： Wentai Liu D.E. Atkins Department of Electrical and Computer Engineering North Carolina State University Raleigh NC

ISBN: (纸本)9780818600265

Folding is a scheme to reduce the silicon area in programmable logic Array (PLA) design. Since optimum folding is an NP-complete problem, methods for estimating potential area saving are desirable. In the case of row folding, both the upper and lower bounds for the saved area ratio d are derived in the paper. By applying the well-known Rent's relationship on a proposed partition model for PLA, we can show that [formula omitted] where r is the Rent's exponent in the range 0 ≤ r ≤ 1. Four examples are given to validate the theoretical prediction. Finally, possible refinement and open problems are also mentioned.

关键词： programmable logic arrays Very large scale integration logic design Silicon programmable control Delay Decoding Minimization NP-complete problem Upper bound

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Molecular characterization of selenoproteins based on decreased glutathione peroxidase activity in preeclampsia

Molecular characterization of selenoproteins based on decrea...

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International Conference on Systems in Medicine and Biology (ICSMB)

作者： Sourav RoyChoudhury Rashmi Mukherjee Koel Chaudhury School of Medical Science and Technology Indian Institute of Technology Kharagpur West Bengal India

Glutathione peroxidase (GPx) and other selenoproteins (SeP) are involved in the detoxification of reactive oxygen species (ROS). ROS is implicated in preeclampsia (PE). Generation of ROS and antioxidant effect of total GPx in women with PE was estimated. Since we found a significant decrease in total GPx level of women with PE, we were motivated to characterize at a molecular level SeP present in GPx (GPx 1-4, 6). Other SeP including selenoprotein P (SEPP), selenoprotein S (SELS) and thioredoxin reductase (TXNRD) were also analyzed since literature suggests that they also play a critical role in down regulation of oxidative stress (OS) in PE. Non SeP GPx were also analyzed for comparison purposes. Serum GPx was measured in venous blood samples of women with PE (Group A; n=25) and normotensive pregnant women (Group B; n=32) spectrophotometrically. Intracellular ROS generated by peripheral blood mononuclear cells was measured using flow cytometry. Molecular characterization of the SeP was done by sequence analysis at nucleotide, codon and amino acid levels. Intracellular ROS level was significantly increased in Group A as compared to Group B. ROS and GPx were significantly negatively correlated in both Group A and Group B. SePs involved in PE, primarily belonged to two nucleotide biasing groups, AT and GC. Dinucleotide usage and codon preferences in these two groups were found to be in accordance with their respective compositional bias. Such nucleotide compositional bias seemed to be major factor driving their selective codon choices. These SePs differ within themselves with respect to their relative amino acid abundance.

关键词： Proteins Bioinformatics Genomics Couplings programmable logic arrays Software Gold

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A high speed BiCMOS table look-up gate

A high speed BiCMOS table look-up gate

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Custom Integrated Circuits Conference (CICC)

作者： P. Baltus P.S. van der Meulen M. Ligthart Sunnyvale Department Philips Research Sunnyvale CA USA

The authors describe a BiCMOS programmable gate array (PGA) with subnanosecond logic block delay and low power consumption. Each logic block can implement any Boolean function of three inputs, a D-latch, or an SR-latch. The PGA is supported by an advanced design environment, which includes schematic capture, interactive functional simulation, logic minimization, and technology mapping.< >

关键词： BiCMOS integrated circuits Electronics packaging programmable logic arrays MOSFETs Delay logic gates logic devices Feedback Application specific integrated circuits Power generation

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Integrating active and cooperative learning strategies in a digital systems design course

Integrating active and cooperative learning strategies in a ...

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Frontiers in Education (FIE) Conference

作者： A. Avila A. Aguilar Department of Electrical Engineering ITESM Monterrey Monterrey Nuevo Leon Mexico

The digital systems area is both a target of technological innovations and a common requirement in many engineering fields. Important technological trends in this area are the use of hardware description languages as a design tool and the continuous improvement of the fabrication technology. Consequently, industry has a high demand for new graduating engineers with qualifications such as: self-guided learning, design skills and teamwork skills. This paper describes the experience achieved by formally incorporating active and cooperative learning strategies to the second-year digital systems course based upon the redesign framework implemented at ITESM Campus Monterrey, Mexico. The digital systems course material is naturally suitable for active and cooperative learning activities. The strategies described in this paper exploit the nobility of the course material by using technological support such as Verilog and PLD/PLA programming tools. The expected benefits were obtained from special course evaluations and professor experiences.

关键词： Digital systems Teamwork programmable logic arrays Hardware design languages Continuous improvement logic design programmable logic devices programmable control Technological innovation Design engineering

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A logic Minimizer for VLSI PLA Design

A Logic Minimizer for VLSI PLA Design

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Design Automation Conference

作者： B. Teel D. Wilde Special Systems Operation Intel Corporation Aloha OR USA

This paper describes LOGMIN, a new, interactive computer aided logic design tool. LOGMIN automates the increasingly complex problems of VLSI PLA design which has made the specification, manipulation, minimization and generation of PLAs difficult to do by hand. LOGMIN allows the specification of both combinational functions and sequential machines. Combinational functions may be described using a variety of operators, intermediate variables or PLA code. A State Machine Description Language (SMDL) was developed for the specification of sequential machines. This paper describes the background and motivation for LOGMIN, the algorithms used and the grammar for SMDL. Several examples are provided.

关键词： logic design Very large scale integration programmable logic arrays Equations logic arrays Circuit simulation Discrete event simulation Documentation High level languages Read only memory

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Microprogram sequencer with concurrent error detection

Microprogram sequencer with concurrent error detection

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Annual IEEE International Conference and Exhibit ASIC

作者： J. Compton A. Albicki Department of Electrical Engineering University of Rochester Rochester NY USA

The design of a microprogram sequencer with concurrent error detection is described. The error detection scheme involves generation of signatures based on past and present sequencer outputs; these signatures are compared frequently against expected values. Software tools for signature assignment are described. Testing results using prototype parts are summarized.< >

关键词： Encoding Software prototyping Fault detection Monitoring Error correction Control systems Software tools Prototypes Electrical fault detection programmable logic arrays

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Locating Internet Congestion: Model and Algorithm

Locating Internet Congestion: Model and Algorithm

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International Conference on Networks Security, Wireless Communications and Trusted Computing, NSWCTC

作者： Ye-kui Qian Ming Chen Yu-ming Zhou Inst. of Command Autom. PLA Univ. of Sci. & Technol. Nanjing Institute of Command Automation People''s Liberation Army University of Science and Technology China

ISBN: (纸本)9781424442232

Congestion is still a great problem which Internet faces. Locating congestion links is very important to execute traffic engineering and mitigate network congestion. Firstly,congestion localization model was presented. After introducing AS performance matrix model, a kind of congestion detection algorithm based on threshold was put forward. Combining AS performance matrix with topology information, congested link localization algorithm was put forward. Simulation results show the algorithm has higher detection rate and lower false positive rate under different topology sizes and congestion levels.

关键词： Internet Detection algorithms Traffic control Network topology Tomography programmable logic arrays Communication system traffic control Wireless communication Computer networks IP networks

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