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检索条件"主题词=Programmable Logic Arrays"

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Generation and properties of new fastest linearly independent transforms over GF(2) with reordering

Generation and properties of new fastest linearly independen...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： B.J. Falkowski C.C. Lozano S. Rahardja School of Electrical and Electronic Engineering Nanyang Technological University Singapore Institute for Infocomm Research Singapore

Several fastest linearly independent (LI) transforms over GF(2) as well as their properties have been presented in recent papers. The transforms are able to provide more effective representations than the Reed-Muller transform for some binary functions. In this paper, new fastest LI transforms are introduced which are obtained by multiplying the factorized transform matrices of the previously defined fastest LI transforms in different orderings. This way of generation ensures that the new transforms have the same computational costs as the original fastest LI transforms and that they possess fast forward and inverse transforms. Properties of the new transforms are also investigated and their experimental results for some binary benchmark functions are given. From comparison of experimental results, it is shown that the new transforms are useful as they are able to give polynomial expansions with smaller number of nonzero spectral coefficients than those of the original fastest LI transforms for most binary benchmark functions.

关键词： Polynomials Computational efficiency Circuit testing Field programmable gate arrays Arithmetic Adders Electrical fault detection Signal processing programmable logic arrays logic devices

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Future directions of dynamically reprogrammable systems

Future directions of dynamically reprogrammable systems

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Custom Integrated Circuits Conference (CICC)

作者： M. Butts Quickturn Design Systems Inc. Portland OR USA

FPGAs have made it possible to build dynamically reprogrammable systems. This paper reviews the current state of FPGA technology, and discusses the two main classes of dynamically reprogrammable systems: logic emulato... 详细信息

关键词： Field programmable gate arrays Integrated circuit interconnections logic arrays programmable logic arrays Table lookup logic programming Read-write memory Reconfigurable logic Hardware Application software

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Analysis and Robust Design of Diode-Resistor Based Nanoscale Crossbar PLA Circuits

Analysis and Robust Design of Diode-Resistor Based Nanoscale...

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International Conference on VLSI Design

作者： Rajat Subhra Chakraborty Somnath Paul Swarup Bhunia Department of Electrical Engineering and Computer Science Case Western Reserve University Cleveland OH USA

ISBN: (纸本)9780769530833;0769530834

logic circuit design with future nanoscale devices using dense and regular fabrics such as crossbar is promising in terms of integration density, performance and power dissipation. Among the emerging alternatives to CMOS, molecular electronics based "diode-resistor logic" has generated considerable interest in recent times. However, some major challenges associated with circuit design using molecular switches are: 1) high defect rate; 2) lack of voltage gain of these switches that prevent logic cascading; and 3) large output voltage level degradation that affect robustness of operation. In this paper, we analyze the issue of input-dependent logic level degradation in diode-resistor style molecular crossbar and develop a simple analytical model for fast and accurate estimation of logic level degradation in a circuit. We also propose a voltage level-aware circuit design technique that limits the worst-case output level degradation. We verify the model by SPICE simulation which shows an average absolute error of less than 2%. Moreover, the proposed design technique improves the logic degradation level from 27% to 7% on an average compared to conventional design.

关键词： Robustness Diodes programmable logic arrays Degradation logic circuits Voltage CMOS logic circuits Circuit synthesis Switching circuits Switches

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Different Control Strategy Results of an Hydro-Power Plant, using Ada

Different Control Strategy Results of an Hydro-Power Plant, ...

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American Control Conference (ACC)

作者： J.L. Mayo H. Lopez D. Garcia C. Suarez G. Ojea Department of Electrical Engineering University of Oviedo Gijon Asturias Spain Dep. of Electrical Engineering. University of Oviedo. Viesques Campus. 33204 Gijón. Asturias. SPAIN.

In the present paper, we show how we have implemented, using Ada language programming, different control strategies based on pole assignment and optimal criterions, for an hydro-power plant. We have solved the servodesign problem either by a feedforward control or by handling errors. An adaptive control procedure based in an I/O minimal structure is proposed, with the robustness of having a twenty four hours continuously performance with the object of being applicable industrially without the switch off from the adaptive loop. This control strategies can be used in the case we are presenting, replacing some techniques classier already proved.

关键词： Tellurium Hydroelectric power generation programmable logic arrays Influenza State-space methods Identity-based encryption

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Preparation of cross-linked biodegradable copolymers based polycarbanion of 3-arm PL(D)LA with brominated pluronic and stereocomplex mediated gelation behavior

Preparation of cross-linked biodegradable copolymers based p...

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IEEE EMBS International Conference on Information Technology Applications in Biomedicine (ITAB)

作者： Jeong A Nam Yeon Jeong Oh Abdullah-Al-Nahain Euisang Yoo Sung Young Park Department of Chemical and Biological Engineering Chungju National University Chungju-si Chungbuk Republic of Korea Korea National University of Transportation Chungju Chungcheongbuk-do KR Department of Textile Convergence of Biotechnology & Nanotechnology Korea Institute of Industrial Technology Korea

We overcome rapidly dissolution properties of Pluronic hydrogels by chemical and physical crosslinking synergistic combination of gelation characteristics with polymer thermo-sensitivity. A new class of injectable sol-gel transition hydrogel was successfully prepared using biodegradable cross-linked poly(lactide)-Pluronic copolymers (PL(D)LA-Pluronic) via polycarbanion derived from enantiomeric 3-arm PLA using brominated Pluronic. The presence of enantiomeric PLA segments enables to form intermolecular stereocomplex, resulting in temperature-responsive injectable hydrogels. In contrast to the Pluronic which exhibits the temperature-dependent sol-gel transition at a concentration of 16% (w/v) or higher, the 3-arm PL(D)LA-Pluronic cross-linked stereocomplex copolymers showed much lower critical gelation concentration (~ 10 wt%). The stereocomplex formation was examined by differential scanning calorimetry (DSC) and X-ray diffraction (XRD). The elegant design of polymeric configurations and the suitable introduction of enantiomeric properties produced a new type of copolymer that can be widely implemented as injectable hydrogels for drug delivery systems.

关键词： programmable logic arrays Polymers

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Studies of detached plasma in the ULS divertor simulator

Studies of detached plasma in the ULS divertor simulator

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IEEE International Conference on Plasma Science (ICOPS)

作者： K.J. Gibson P.K. Browning D.A. Forder J. Hugill M. Johnson B. Mihaljcic The University of Manchester - North Campus Manchester Manchester GB Dept. of Phys. Univ. of Manchester Inst. of Sci. & Technol. UK

Summary form only given. We report on experimental and modelling studies of "detached " plasma operation in the UMIST Linear System (ULS) divertor simulator. The ULS is a device designed to study a range of edge plasma physics issues relevant to tokamak gas target divertors and is capable of producing steady-state plasmas with electron densities and temperatures in the range 10/sup 17/-10/sup 19/ m/sup -3/ and 2-15 eV respectively; this plasma is made to flow into a separate gas target chamber into which a variety of gases can be introduced. Previous studies of detached plasmas in the ULS have centred on the interaction between hydrogen plasma and low pressure (< 10 mTorr) neutral hydrogen gas and have identified a regime in which molecular activated recombination processes appear to be the dominant plasma loss mechanism (MG Rusbridge et al, Plas. Phys. Cont. Fus. 42, 588 (2000)). Here we report on further studies in which the upstream plasma parameters are varied such that three-body and radiative electron-ion recombination (EIR) of hydrogen plasmas can be dominant. Spectroscopic and Langmuir probes data have demonstrated the resulting highly non-equilibrium distribution of excited neutral states resulting from these recombining plasmas. Evidence of hysteresis is found in the transition between the two modes (EIR and MAR) of recombination. Initial modelling of the recombination region in the target chamber is being undertaken using simplified one-dimensional electron energy balance and continuity equations (Krasheninnikov et al, Phys. Plas. 4, 1644 (1997)). We determine the factors that govern the threshold between MAR and EIR dominant detached regimes in terms of the upstream plasma parameters. We discuss the significance of these results for future divertor simulator research.

关键词： Plasma simulation Plasma temperature Spontaneous emission Plasma devices Plasma density Hydrogen Electrons programmable logic arrays Linear systems Physics

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Template generation and selection algorithms

Template generation and selection algorithms

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IEEE International Workshop on System-on-Chip for Real-Time Applications

作者： Yuanqing Guo G.J.M. Smit H. Broersma P.M. Heysters Faculty of EEMCS University of Twente Enschede Netherlands

ISBN: (纸本)076951944X

The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation method to extract functional equivalent structures, i.e. templates, from a control data flow graph. By inspecting the graph the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers the algorithm can find all distinct templates with multiple outputs. The template selection algorithm shows how this information can be used in compilers for reconfigurable systems. The objective of the template selection algorithm is to find an efficient cover for an application graph with a minimal number of distinct templates and minimal number of matches.

关键词： Field programmable gate arrays Tiles Flow graphs System-on-a-chip VLIW Clustering algorithms programmable logic arrays Electronic mail Data mining Multimedia systems

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Synthesis by spectral translation using Boolean decision diagrams

Synthesis by spectral translation using Boolean decision dia...

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Design Automation Conference

作者： J.P. Hansen M. Sekine Toshiba ULSI Research Laboratories Kawasaki Japan

Many logic synthesis systems are strongly influenced by the size of the SOP (Sum-of-Products) representation of the function being synthesized. Two-level PLA (programmable logic Array) synthesis and many multi-level synthesis systems perform poorly without a good SOP representation of the target function. In this paper, we propose a new spectral-based algorithm using BDDs (Boolean Decision Diagram) to transform the target function into a form that is easier to synthesize by using a linear filter on the inputs. Using the methods described in this paper, we were able to perform spectral translation on circuits with many more inputs and much larger cube sets then previously possible. This can result in a substantial decrease in delay and area for some classes of circuits.

关键词： Network synthesis Boolean functions programmable logic arrays Circuit synthesis Permission Data structures Ultra large scale integration Laboratories Nonlinear filters Delay

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Edge Contraction Simplification Based on DEM Terrain

Edge Contraction Simplification Based on DEM Terrain

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International Conference on Computational Intelligence and Software Engineering (CiSE)

作者： Dong Wei Yu Zhao School of Computer Hefei University of Technology Hefei China School of Information Technology and Engineering Shenyang University of Technology Shenyang China

Edge contraction simplification based on DEM terrain algorithm is proposed as a new terrain simplification algorithm which is based on DEM terrain data characteristics. The algorithm introduces the gradient of triangle, and combines with gradient and the length of edges as weight of the vertex to represent the importance of a vertex. By using the vertex weight, we can constrain the region being affected by edge contraction small, which will avoid appearing too large triangle or oversimplification for somewhere of the model. Experimental results show that our algorithm runs fast and is easy to implement.

关键词： Computer errors Error correction Information technology Displays Data engineering programmable logic arrays Rendering (computer graphics) Graphics Hardware Layout

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MuCCRA chips: Configurable dynamically-reconfigurable processors

MuCCRA chips: Configurable dynamically-reconfigurable proces...

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IEEE Asian Conference on Solid-State Circuits (ASSCC)

作者： Hideharu Amano Yohei Hasegawa Satoshi Tsutsumi Takuro Nakamura Takashi Nishimura Vasutan Tanbunheng Aepu Parimala Toru Sano Masaru Kato Graduate School of Science and Technology Keio University Yokohama Japan

Coarse grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine in system-on-chips (SoCs). Evaluation results in recent researches revealed that the parameters of optimal processor array structure: granularity, functions, array size, context size and interconnection flexibility, are completely different for each application. That is, DRPAs should be configurable for target SoCs and applications. MuCCRA is a project for developing a DRPA generator which can generate RTL model, testing environment and programming environment for various types of DRPAs just by selecting the specific parameters. Here, two prototype chips MuCCRA-1 and MuCCRA-2 developed in the project are introduced and evaluated. MuCCRA-1 was implemented with Rohm's 0.18 mum CMOS process mainly for multi-media applications, while MuCCRA-2 with ASPLA's 90 nm CMOS process was designed focusing on area optimization used as a cost-effective IP in multi-core SoCs.

关键词： CMOS process logic testing Engines Programming environments Prototypes Libraries Program processors Hardware design languages System testing programmable logic arrays

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