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检索条件"主题词=Programmable Logic Arrays"

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Real-time image manipulation using soft hardware

Real-time image manipulation using soft hardware

引用

IEEE International Conference on Systems, Man and Cybernetics

作者： R.G. Shoup Interval Research Palo Alto CA USA

This paper discusses the use of restructurable hardware, specifically field programmable gate arrays, in real-time image processing and manipulation tasks such as convolution filtering, scaling and rotation, composition, color space transformation, etc. Each of these functions can be implemented using a customized pipeline design to obtain a high degree of parallelism and thus high performance. In this work, we show how a simple arrangement of FPGAs and memory can be used to synthesize a wide variety of image processing pipelines having different topologies and functionality.< >

关键词： Hardware programmable logic arrays Field programmable gate arrays Image processing Pipeline processing Parallel processing Color Microprocessors programmable logic devices Clocks

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Developing Flexible 3D Printed Antenna Using Conductive ABS Materials

Developing Flexible 3D Printed Antenna Using Conductive ABS ...

引用

IEEE International Symposium on Antennas and Propagation

作者： Milad Mirzaee Sima Noghanian Lindsey Wiest Isaac Chang Department of Electrical Engineering University of North Dakota Grand Forks ND USA Department of Technology University of North Dakota Grand Forks ND USA

ISBN: (纸本)9781479978168

This paper presents the feasibility of conductive acrylonitrile butadiene styrene (ABS) materials in the fabrication of flexible three-dimensional (3D) antennas using additive manufacturing method. To demonstrate this application a bowtie antenna with coplanar waveguide (CPW) feed structure has been designed and measured. The prototype of the antenna has been fabricated using Makerbot dual 3D printer and flexible polylactic acid (PLA) and ABS filaments for dielectric and conductive parts of the antenna, respectively. To our knowledge, this is the first reported antenna fabricated with conductive ABS material. The dielectric properties of the PLA and ABS filaments have been measured using Agilent performance probe. The fabricated antenna possesses compact size, light-weight and mechanically flexible structure. In addition it achieves wide bandwidth of 24.18 % at the center frequency of 7.81 GHz.

关键词： ABS resins DDX41 gene Antilock Braking Systems ANTENNA antennae center frequency conductivity bow-tie antennas 3D Printer programmable logic arrays Microstrip antennas fabrication FLEXIBLE coplanar waveguides

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BIST-based diagnostics of FPGA logic blocks

BIST-based diagnostics of FPGA logic blocks

引用

IEEE International Test Conference

作者： C. Stroud E. Lee M. Abramovici Department of Electrical Engineering University of Kentucky USA Bell Laboratories Lucent Technologies Inc. Murray Hill NJ USA

Accurate diagnosis is an essential requirement in many testing environments, since it is the basis for any repair or replacement strategy used for chip or system fault-tolerance. In this paper we present the first approach able to diagnose faulty programmable logic blocks (PLBs) in Field programmable Gate arrays (FPGAs) with maximal diagnostic resolution. Our approach is based on a new Built-In Self-Test (BIST) architecture for FPGAs and can accurately locate any single and most multiple faulty PLBs. An adaptive diagnostic strategy provides identification of faulty PLBs with a 7% increase in testing time over the complete detection test, and can also be used for manufacturing yield enhancement. We present results showing identification of faulty PLBs in defective ORCA chips.

关键词： Field programmable gate arrays Circuit testing Built-in self-test System testing Circuit faults programmable logic arrays logic devices logic testing Fault diagnosis Manufacturing

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Toward multiple-valued configurable random molecular logic units

Toward multiple-valued configurable random molecular logic u...

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IEEE Conference on Nanotechnology

作者： J.M. Seminario L.E. Cordova Department of Electrical Engineering University of South Carolina Columbia SC USA

A design paradigm for molecular electronics is simulated to demonstrate that clusters of devices showing negative differential molecular impedance can be used as minimum programmable units. These molecular scale reson... 详细信息

关键词： Resonant tunneling devices Electric variables logic devices Impedance Nanoscale devices programmable logic arrays Metal-insulator structures Gold Nanoporous materials Contacts

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Optimization of field-programmable gate array logic block architecture for speed

Optimization of field-programmable gate array logic block ar...

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Custom Integrated Circuits Conference (CICC)

作者： S. Singh J. Rose D. Lewis K. Chung P. Chow Department Electrical Engineering University of Toronto ONT Canada

The authors explore the effect of the choice of logic block on the speed of a field-programmable gate array (FPGA). A set of logic circuits was implemented as FPGAs, each using a different logic block, and the speed of the implementation was measured. While the result depends on the delay of programmable routing, experiments indicate that wide input PLA (programmable logic array)-style AND-OR gates, four- and five-input lookup tables, and certain multiplexer configurations produce the lowest total delay over the important values of routing delay. Furthermore, significant gains in performance (from 10% to 41% reduction in total delay) can be achieved by connecting a small number of logic blocks together using hard-wired connections.< >

关键词： logic arrays Field programmable gate arrays logic gates programmable logic arrays Delay logic circuits Routing Velocity measurement Table lookup Multiplexing

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A "soft++" eFPGA physical design approach with case studies in 180nm and 90nm

A "soft++" eFPGA physical design approach with case studies ...

引用

IEEE Computer Society Annual Symposium on VLSI

作者： V. Aken'Ova R. Saleh Department of Electrical and Computer Engineering University of British Columbia Vancouver BC Canada

Our recent work in embedded FPGAs has been focused on a soft IP approach where programmable fabrics are described at the RTL level and implemented using the ASIC digital flow and generic standard cells. Early results showed significant penalties in area, delay, and power overhead. However, using tactical standard cells and a structured physical design approach within such a flow, we were able to obtain large savings in area and delay. We defined this new approach as soft++ eFPGA. This paper provides details of the physical design flow, with particular emphasis on floor-planning, interconnect-planning, and clock tree synthesis. The advantages of our approach in handling larger circuits are demonstrated on a set of realistic benchmark circuits implemented in 180nm and 90nm CMOS process technology

关键词： Computer aided software engineering Field programmable gate arrays Fabrics Application specific integrated circuits Delay Integrated circuit interconnections programmable logic arrays Costs logic design programmable logic devices

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A 100 MHz single-phase clocked PLA using a novel sense amplifier

A 100 MHz single-phase clocked PLA using a novel sense ampli...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： P. Ingelhag C. Svensson LSI Design Center IFM Linkoping University Linkoping Sweden

A novel sense amplifier to enhance speed in high-speed array logic is presented. The sense amplifier is simple and can be designed robustly to process variations. The sense amplifier is used in a further development of the single-phase CMOS circuit technique. Two single-phase clocked PLAs have been designed for test purposes. SPICE simulations show that a PLA (with 64 inputs, 256 intermediate AND-functions, 64 outputs, worst-case logical configuration, and with a conservative noise margin) will run faster than 100 MHz in a 2- mu m standard CMOS process. One smaller prototype chip has been tested experimentally.< >

关键词： Clocks programmable logic arrays logic arrays CMOS logic circuits Process design Noise robustness CMOS technology Circuit testing SPICE Circuit simulation

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Topological Simulation to Recognize the Steady State Thermal Behavior of Customized Finger Splint

Topological Simulation to Recognize the Steady State Thermal...

引用

Computational Modelling, Simulation and Optimization (ICCMSO), International Conference on

作者： Ashwani Kumar Deepak Chhabra Department of Mechanical Engineering UIET Maharshi Dayanand University Rohtak India

The recent developments in simulation engineering have made it feasible to solve various multiphysics problems of designing and testing through advanced mathematical modeling with optimal outputs to meet manufacturing leading accuracy. The engineers preferably adopt topology optimization (TO) techniques to establish a performance-oriented balance between affordability and strength, interpolating unanticipated hidden shapes from a given design domain. The thermal analysis embedded with topological simulation enables the designers to understand the thermal performance of complex structures under given boundary conditions. In the present article, a cumulative finite element analysis (FEA) based structural and thermal simulation approach has been implemented to understand the customized mallet finger splint's mechanical and thermal behavior. The customized splint subjected to operational loads and constraints was optimized for compliance criterion with a successive reduction in mass percentage. Optimization results indicated that a considerable weight reduction improves the orthosis ventilation behavior, which may improve the performance outcomes for the patients during the recovery.

关键词： Fingers programmable logic arrays Mathematical models Thermal analysis Behavioral sciences Topology Optimization

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A new multilevel hierarchical MFPGA and its suitable configuration tools

A new multilevel hierarchical MFPGA and its suitable configu...

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IEEE Computer Society Annual Symposium on VLSI

作者： Z. Marrakchi H. Mrabet H. Mehrez Department ASIM-LIP6 Université Paris 6-Pierre et Marie Curie Paris France

In this paper we evaluate a new multilevel hierarchical MFPGA. The specific architecture includes two unidirectional programmable networks. A downward network based on the butterfly-fat-tree topology, and a special rising network. New tools are developed to place and route several benchmark circuits on this architecture. Comparison with the traditional symmetric, Manhattan mesh architecture shows that MFPGA can implement circuits with fewer switches and a smaller area.

关键词： Switches Field programmable gate arrays Routing Joining processes Network topology programmable logic arrays Integrated circuit interconnections Circuit topology Switching circuits logic arrays

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Data modeling for distribution of oceanographic databases

Data modeling for distribution of oceanographic databases

引用

OCEANS

作者： J.A. McNitt Integrated Performance Decisions Arlington VA USA

The distribution of oceanographic databases, including tailored data products, can be managed with an object-oriented approach within an Open Systems Environment (OSE). The United States Navy's plans to implement OSE software architectures for many of its workstation-based systems, including environmental systems, provides an opportunity to manage the database distribution processes in such a way as to respond to operational requirements and the availability of locally derived information.< >

关键词： Computer architecture Workstations Environmental management Open systems Data analysis Distributed databases Command and control systems Hardware Road transportation programmable logic arrays

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