This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field programmable gate arrays (FPGAs). Previous t...
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ISBN:
(纸本)9781595933898
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field programmable gate arrays (FPGAs). Previous techniques developed for mapping into asynchronous embedded memories cannot be used because modern FPGAs do not have asynchronous embedded memories. After technology mapping, an area-prediction cost function is used to guide the selection of logic cones to be placed in embedded memories. Extra logic is added to compensate for missing asynchronous functionality on the synchronous memories. Experiments conducted on Altera's Stratix device family indicate that this embedded memory mapping technique can provide an average area reduction of 6.2% and up to 32.5% on a large set of industrial designs. A small architecture change that increases the size of the FPGA fabric by 0.05% can increase the average area reduction to 14.1% and up to 59.1% on the same design set
In this paper we present an IT continuity framework which deals with business continuity issues within organizations. The approach is based on an optimal mix between five groups of continuity measures that are associa...
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In this paper we present an IT continuity framework which deals with business continuity issues within organizations. The approach is based on an optimal mix between five groups of continuity measures that are associated with three risk clusters. Most organizations do have some continuity measures in case their level of operation is disrupted. However, these continuity measures are often isolated from each other and do not form an integral approach. They neither do cover the entire incident field. This framework supports the uniformity that exists among known continuity measures. Because of its generic nature, IT service providers can use the framework to organize their (existing) IT continuity portfolio in order to provide an optimal continuity solution to their customers.
In this paper, a 14-bit, 130-MHz CMOS current-steering DAC is presented. Different from traditional intrinsic-accuracy DACs, its INL can be improved by dynamic adjustment, which allows a significant reduction of the c...
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In this paper, a 14-bit, 130-MHz CMOS current-steering DAC is presented. Different from traditional intrinsic-accuracy DACs, its INL can be improved by dynamic adjustment, which allows a significant reduction of the chip area. The layout has been carefully designed so that the signal lines of the current sources have the same length, thus good synchronization among the current sources can be achieved. The measured DNL and INL is 0.45 LSB and 0.7 LSB respectively. The spurious-free dynamic range is 82 dB at a 1 MHz signal frequency and 130 MHz sampling frequency. The DAC has been implemented in a standard 1P5M 0.25-/spl mu/m CMOS technology. The area of the current source block is 1 mm/sup 2/, and the whole core area is only 3.5 mm/sup 2/.
In this paper, we present an ontology modeling tool for building Chinese domain ontology, which not only offers automatic acquisition knowledge from multiple dictionaries, but also corresponds with a dictionary-based ...
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In this paper, we present an ontology modeling tool for building Chinese domain ontology, which not only offers automatic acquisition knowledge from multiple dictionaries, but also corresponds with a dictionary-based ontology modeling methodology that combines methontology and throwaway prototype. By using a case study of spatial information science ontology modeling, the theoretical method and implementation tool of dictionary-based ontology modeling are presented in details. Experience shows that automatic acquisition knowledge from multiple dictionaries for ontology modeling is feasible and merging knowledge between multiple dictionaries can make assistant modeling more effective.
Large networks composed of multiple input translinear elements (MITEs) have been typically limited by the mismatches between individual MITEs. This paper presents the methodology that allows for such systems to be fea...
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Large networks composed of multiple input translinear elements (MITEs) have been typically limited by the mismatches between individual MITEs. This paper presents the methodology that allows for such systems to be feasible through the application of floating-gate programming techniques. We introduce designs for a programmable MITE, and demonstrate the ability to systematically reduce offsets through accurate programming of example circuits.
Successful physical layout analysis (PLA) is a key factor in the performance of text recognizers and many other applications. PLA solutions for scanned Arabic documents are few and difficult to compare due to differen...
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ISBN:
(纸本)9781538614600
Successful physical layout analysis (PLA) is a key factor in the performance of text recognizers and many other applications. PLA solutions for scanned Arabic documents are few and difficult to compare due to differences in methods, data, and evaluation metrics. To help evaluate the performance of recent Arabic PLA solutions, the ASAR 2018 Competition on Physical Layout Analysis (PLA) was organized. This paper presents the results of this competition. The competition focused on analyzing layouts for Arabic scanned book pages (SAB). PLA-SAB required solutions of two tasks: page-to-block segmentation and block text/non-text classification. In this paper we briefly describe the methods provided by participating teams, present their results for both tasks using the BCE-Arabic benchmarking dataset [1], and make an open call for continuous participation outside the context of ASAR 2018.
Proposes a combination of PLA decomposition and unidirectional error detecting techniques which permits concurrent testing for all single faults in a circuit (both in the decomposed modules and on the interconnection ...
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Proposes a combination of PLA decomposition and unidirectional error detecting techniques which permits concurrent testing for all single faults in a circuit (both in the decomposed modules and on the interconnection lines), for a lower area overhead cost than is normally associated with unidirectional error detecting codes.< >
This systematic literature review scrutinizes the role of Predictive Learning Analytics (PLA) in higher education from 2017 to 2023. Anchored by the PRISMA flowchart, the methodology involved a rigorous selection proc...
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ISBN:
(数字)9798350372663
ISBN:
(纸本)9798350372670
This systematic literature review scrutinizes the role of Predictive Learning Analytics (PLA) in higher education from 2017 to 2023. Anchored by the PRISMA flowchart, the methodology involved a rigorous selection process from databases such as IEEE Xplore, Sage, ACM Digital Library, PubMed, Scopus, and ERIC. This systematic literature review filtered the studies based on inclusion criteria: peer-reviewed articles published in English, with full texts available, and excluded non-peer-reviewed sources, non-English publications, and those lacking definitive outcomes. The review addresses four questions in HEI's: the labeling and definition of PLA, its impact on student success, its role in enhancing teaching practices, and its influence on administrative functions. From the initial 142 records, 17 studies met the criteria, providing a comprehensive insight into PLA's role in shaping the academic landscape. The findings indicate that PLA is labeled as a strategic tool for leveraging student data to forecast and enhance learning outcomes. The analysis reveals PLA's significant contribution to student success through early identification of at-risk students and personalized intervention strategies. Furthermore, PLA has been instrumental in refining teaching methods and providing actionable insights to educators. For administrators, PLA informs resource allocation, curriculum development, and policy-making. This review emphasizes the transformative potential of PLA in optimizing higher education outcomes, signifying a paradigm shift towards data-driven educational strategies
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