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An unnatural amino acid based fluorescent probe for phenylalanine ammonia lyase

ORGANIC & BIOMOLECULAR CHEMISTRY 2014年第31期12卷 5818-5821页

作者： Tian, Zhenlin Zhu, Weiping Xu, Yufang Qian, Xuhong E China Univ Sci & Technol Sch Pharm Shanghai Key Lab Chem Biol State Key Lab Bioreactor Engn Shanghai 200237 Peoples R China

A fluorescent probe (2a-LP) based on an unnatural amino acid (UAA) is developed for the detection of phenylalanine ammonia lyase (PAL). In the presence of PAL, 2a-LP is catalytically deaminated to ortho-amino-transcinnamic acid (o-a-CA), which shows a remarkable "off-on" fluorescence signal Thus, the probe 2a-LP enables direct visualization of the PAL activity in tomato under UV illumination and has potential in vitro assays.

关键词： unnatural fluorescent lyase SHCBP1 gene programmable logic arrays Phenylalanine Ammonia-Lyase utilised agricultural area Lyases LRIT1 gene Fluorescence

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A NOTE ON OSCILLATIONS IN WALSH-DOMAIN ANALYSIS OF 1ST-ORDER SYSTEMS

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS 1991年第8期38卷 945-948页

作者： DEB, A FOUNTAIN, DW GEORGIA INST TECHNOL DEPT ELECT ENGNATLANTAGA 30332

This paper characterizes oscillations found in Walsh-domain analysis of first-order systems. A useful condition for occurrence of such oscillations is given and the expression for the percentage maximum overshoot for different system time constants (1/a), scaling constants (alpha), and number of Walsh functions in the set considered (m) has been derived. Several graphs are presented to show the variational behavior of the percentage maximum overshoot, and the reasons for this oscillatory phenomenon are discussed. Comparisons are also made between the actual time-domain solution and the Walsh-domain solution, which gives rise to oscillations if the derived constraints are violated.

关键词： programmable logic arrays Built-in self-test logic testing Fourier series Circuits and systems logic circuits Circuit testing Circuit faults Hardware

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Fabrication technology for high-density Josephson integrated circuits using mechanical polishing planarization

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IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY 1999年第2期9卷 3198-3201页

作者： Numata, H Nagasawa, S Tanaka, M Tahara, S NEC Corp Ltd Fundamental Res Labs Tsukuba Ibaraki 3058501 Japan

A mechanical polishing planarization (MPP) process is developed with an endpoint detection method. h-IPP makes it possible to form self-aligned contacts on small junctions and to decrease parasitic inductance. It can also control the thickness of the insulation layers precisely. MPP was used to fabricate a 22 mu m x 22 mu m vortex transitional memory cell and the cell operated correctly. The reliability of interlayer insulation was increased for 61-Kbit memory cell arrays fabricated using MPP. It is concluded that MPP is an effective technology for fabricating high-density Josephson circuits.

关键词： Fabrication Integrated circuit technology programmable logic arrays Planarization Insulation Slurries Scanning electron microscopy Electrodes Sputtering Superconducting devices

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Stereocomplex-nanocomposite formation of polylactide/fluorinated-clay with superior thermal property using supercritical fluid

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MACROMOLECULAR RESEARCH 2012年第6期20卷 545-548页

作者： Purnama, Purba Lim, Soon Ho Jung, Youngmee Kim, Soo Hyun Korea Inst Sci & Technol Biomat Res Ctr Seoul 136791 South Korea Univ Sci & Technol Taejon 305333 South Korea Korea Inst Sci & Technol Polymer Hybrid Res Ctr Seoul 136791 South Korea

Polylactides (PLA) is a well-known green polymer because of their sustainability, biocompatibility and biodegradabil-ity. They have been used in various applications. But, for specific applications, homopolymer polylactide (PLA) has limitations because of thermal and mechanical properties. As we knew, stereocomplexation and nanocomposites are the choices to enhance the properties of PLA. Stereocomplexation of PLA with different configuration can enhance the thermal properties of polylactide by generated stereocomplex polylactide (s-PLA). This macromolecule has increasing the melting point about ～50 °C higher than its homopolymer. In other hand, the addition of inorganic material into polymer generated a nano-scale dispersion of filler (inorganic material) in the polymer matrix, so-called *** exhibits superior physical mechanical properties.

关键词： Homopolymers programmable logic arrays supercritical fluids melting point Polylactides inorganic materials Mechanical properties Thermal properties

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A ONE-DAY CHIP - AN INNOVATIVE IC CONSTRUCTION APPROACH USING ELECTRICALLY RECONFIGURABLE logic VLSI WITH ON-CHIP programmable INTERCONNECTIONS

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IEEE JOURNAL OF SOLID-STATE CIRCUITS 1986年第2期21卷 223-227页

作者： IKAWA, Y URUI, K WADA, M TAKADA, T KAWAMURA, M MIYATA, M AMANO, N SHIBATA, T TOSHIBA CORP INFORMAT & COMMUN SYST LABKAWASAKI 210JAPAN TOSHIBA CORP DIV SEMICONDKAWASAKI 210JAPAN

A new custom IC design methodology and the associated logic VLSI chip, which offer an ultimately fast turnaround-time logic IC construction method, are proposed. The chip contains various kinds of logic functional blocks, such as inverters, NORs, NANDs, flip-flops, shift registers, counters, adders, multiplexers, and ALUs. Up to 200 SSI/MSI standard logic blocks can be provided. The E/SUP 2/PROM-type MOSFET switch matrix is adjacent to the functional blocks, in order to connect any output to specific inputs of the functional blocks. It also offers a ready-to-test aid, obtained by monitoring the signal waveform developed inside the chip. These features have the advantage over the present custom IC design methods (gate array, standard cell, silicon compiler, programmable logic array) that the designer can easily redesign the logic to obtain a digital system in an IC in a single day.

关键词： Reconfigurable logic Very large scale integration programmable logic arrays logic design Design methodology Switches Digital integrated circuits Pulse inverters Flip-flops Shift registers

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AUTOMATION OF RECIPROCATING GAS-ENGINE COMPRESSOR PACKAGES USING programmable logic CONTROLLERS

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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS 1990年第5期26卷 909-913页

作者： GOFF, WH Arco Oil and Gas Company Dallas TX USA

An approach taken to automate gas engine/compressor skid-mounted packages is described. The approach includes design criteria with special considerations regarding the application of programmable logic controllers (PLCs). Using typical industry-standard specifications along with I/O (input/output) lists, sequence narratives, and logic diagrams, the PLCs may be programmed to perform the desired operation. The added capabilities of the PLC enhance simulation, checkout, and startup. The present work is based on experience gained during the installation of three reciprocating engine/compressor packages on remote unmanned platforms in the Gulf of Mexico.< >

关键词： Automation Engines Packaging programmable logic arrays programmable logic devices programmable control Automatic control Valves Control systems Petroleum

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Hardware Fingerprint Authentication in Optical Networks Assisted by Anomaly Detection

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IEEE PHOTONICS TECHNOLOGY LETTERS 2022年第19期34卷 1030-1033页

作者： Kang, Linjiao Zhang, Liuming Huang, Xinran Hu, Weisheng Yang, Xuelin Shanghai Jiao Tong Univ State Key Lab Adv Opt Communicat Syst & Networks Shanghai 200240 Peoples R China

A hardware fingerprint-based physical layer authentication (PLA) is proposed and demonstrated for optical networks using anomaly detection. To accurately classify the legal devices and effectively detect the rogue devices, the unique fingerprint features are extracted from the received optical spectra of optical transmitters by the linear discriminant analysis (LDA) and then identified by the support vector data description (SVDD) algorithm. The recognition accuracy of 97.8% is experimentally demonstrated based on the optical spectra from 8 transmitters after 20 km standard single-mode fiber transmission, while the average false alarm rate and the miss alarm rate are 2.5% and 0.1%, respectively. The results show the full feasibility and excellent performance of the proposed PLA scheme in security enhancement using hardware fingerprints for optical networks without any threshold selection.

关键词： Fingerprint recognition Law Authentication programmable logic arrays Hardware Optical fiber networks Training Anomaly detection hardware fingerprint optical network security physical layer authentication (PLA)

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CAMAC DATA SCANNER WITH LRS4299 DATABUS INTERFACE

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 1987年第4期34卷 954-957页

作者： IKEDA, H National Laboratory for High Energy Physics (KEK) Tsukuba Ibaraki Japan

A CAMAC data scanner was designed and manufactured. The scanner is in conformance with LeCroy's 4290 series DATABUS interface. The scanner supports CAMAC single action and block transfer mode with zero suppress capability. The S2 timing of CAMAC cycle may be skipped to squeeze data acquisition cycle. The scanners are located at front-end CAMAC crates in the FASTBUS based TOPAZ data acquisition system.

关键词： CAMAC Data acquisition Fastbus programmable logic arrays Strontium Laboratories Manufacturing Timing Detectors Size control

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SYNAPSE - AN EXPERT SYSTEM FOR VLSI DESIGN

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COMPUTER 1986年第7期19卷 78-89页

作者： SUBRAHMANYAM, PA AT&T Bell Laboratories

First Page of the Article

关键词： Expert systems Very large scale integration programmable logic arrays logic circuits Equations User interfaces Large scale integration Fabrication Geometry Terminology

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A TECHNOECONOMIC ASSESSMENT OF APPLICATION-SPECIFIC INTEGRATED-CIRCUITS - CURRENT STATUS AND FUTURE-TRENDS

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PROCEEDINGS OF THE IEEE 1987年第6期75卷 829-841页

作者： FEY, CF PARASKEVOPOULOS, DE XEROX CORP XEROX MICROELECTR CTRREG LSI DESIGN CTREL SEGUNDOCA 90245

ASIC design methodologies are assessed from the system designer's point of view by comparing the entire IC-related product cost, design schedule, functionality, and risks to that of designs containing standard devices. ASIC methodologies include programmable logic devices, gate arrays, standard cells, and full custom, all primarily in 2-m CMOS, at production volumes of 1 to 100K units per year and at complexities of 5OO to 20 000 gates per device. It is shown that "gates per pin" is the key determinant of total IC-related cost. Products containing ASIC cost less than those containing SSI/MSI, since ASICs raise the number of gates per pin from 2 to a range of 40-200. More surprising, products using ASIC devices cost less than products containing combinations of standard LSI/VLSI and SSI/MSI, if their gates per pin is 2-3 times that of the products containing standard devices. Each design methodology has regions, or market segments, where it is competitive. But there are large regions of small cost differences between two ASIC methodologies. Currently, these regions use primarily the older methodologies, i.e., gate arrays at low production volumes and full custom at high volumes. They also provide future opportunities for standard cells. Currently, IC manufacturing cost accounts for about 15 percent of the logic-related total cost, field maintenance for 17 percent, device and system development for 11 percent, and systems related manufacturing cost for 57 percent. These percentages are expected to migrate to 17, 20, 13, and 50 percent, respectively, by 1990. Our ASIC techno-economic assessment is summarized in 27 nomograms, figures, and charts.

关键词： Application specific integrated circuits Design methodology programmable logic arrays Production Manufacturing Cost function Product design Job shop scheduling programmable logic devices CMOS logic circuits

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