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检索条件"主题词=Programmable Logic Arrays"

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Cluster-level parameters at 5.25 GHz indoor-to-outdoor and outdoor-to-indoor MIMO radio channels

Cluster-level parameters at 5.25 GHz indoor-to-outdoor and o...

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16th IST Mobile and Wireless Communications, vol.2

作者： Lassi Hentila Mikko Alatossava Nicolai Czink Pekka Kyosti Elektrobit Limited Oulu Finland 4G Lab / Centre for Wireless Communications University of Oulu Finland Telecommunications Research Center Vienna Vienna Austria Institut für Nachrichtentechnik und Hochfrequenztechnik Technische Universität Wien Vienna Austria

This paper describes cluster-level results of indoor-to-outdoor and outdoor-to-indoor double-directional MIMO radio channel measurements carried out at 5.25 GHz. The measurements were performed using a wideband multi-antenna radio channel sounder. Using a set of several thousands of snapshots at the two reciprocal environments, we provide a useful insight into the channel for further channel modelling and channel simulations. We discuss the cluster azimuth spread, cluster delay spread, inter-cluster shadowing, number of clusters per snapshot, number of paths within the cluster, cluster birth rate and cluster lifetime. These parameters are presented for different scenarios by their statistical distributions, and also by their cross-correlation. The results show that both outdoor-to-indoor and indoor-to-outdoor scenarios behave very similar, so we suggest to merge these two cases.

关键词： MIMO Azimuth Delay Frequency Transmitting antennas Wireless communication Wideband programmable logic arrays Costs Antenna measurements

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Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy

Power, Delay and Yield Analysis of BIST/BISR PLAs Using Colu...

引用

8th International Symposium on Quality Electronic Design (ISQED 2007)

作者： Uthman Alsaiari Resve Saleh Electrical and Computer Engineering Department University of British Columbia Vancouver Canada

As the number of transistors on a chip begins to exceed 1 billion, it will be mandatory to use a portion of the transistors for the purposes of Built-in-Self-Test (BIST) and Built-in-Self-Repair (BISR) as part of the supporting circuitry. However, this will require the use of structured logic, such as programmable logic arrays (PLAs) or structured ASIC. In this paper, we select the fastest and lowest energy PLA design to date and combine it with a block duplication strategy to construct a BIST/BISR PLA in order to establish a reference design. Then, we introduce a PLA redundancy in the form of spare columns and carry out a yield analysis. The results of the yield analysis suggest that using duplication for BIST/BISR is better suited for small PLAs while using spares is more suitable for larger PLAs. The spares needed are determined by several factors including target yield, area, power and delay.

关键词： Delay Built-in self-test programmable logic arrays Redundancy Circuit testing Automatic testing logic testing Integrated circuit yield Circuit faults Semiconductor device manufacture

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Incremental-best-relay selection scheme in coded cooperative networks

Incremental-best-relay selection scheme in coded cooperative...

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International Conference on E-Business and E-Government (ICEE)

作者： Chunming Shen Yuanyuan Gao Yalong Zhang Mingxi Guo Institute of Communications Engineering People''s Liberation Army University of Science and Technology Nanjing China

ISBN: (纸本)9781424486915

Incremental relaying is introduced to the multi-nodes coded cooperative system. The Incremental-Best-Relay selection scheme in coded cooperative networks is proposed based on opportunistic relaying selection strategy. The outage probability and average spectral efficiency are analyzed and simulated. Simulation results show that the proposed scheme can achieve higher average spectral efficiency while keep the same outage probability as opportunistic relaying-coded cooperation, and an optimal average spectral efficiency also can be found as the average ratio of signal to noise (SNR) is fixed.

关键词： Relays Time division multiple access Wireless communication Signal to noise ratio Simulation Spread spectrum communication programmable logic arrays

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DVB-T/H receiver architecture for advanced system performance measurement

DVB-T/H receiver architecture for advanced system performanc...

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2008 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting

作者： C. Fernandez G. Prieto J. Morgade M. M. Velez A. Arrinda J. M. Matias Department Electronics and Telecommunications University of Basque Country (UPV-EHU) Bilbao Spain

The main objective of the project was to implement a portable hardware-independent DVB-T/H software receiver, providing a complete tool of signal analysis and measurement. As a computer-based program, this receiver could run either embedded inside a vector signal analyzer, or separately on a PC remotely connected to it. Thanks to its modular architecture, the receiver can be updated to demodulate any other digital standard with relatively little effort. The result is a complete software-based tool of digital signal analysis, which could also be designed as programmable logic (PFGA) to improve the general performance of the system.

关键词： Digital video broadcasting System performance Signal analysis Computer architecture Software tools Software measurement Embedded computing Signal design logic design programmable logic arrays

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Concurrent Error Detection for Combinational logic Blocks Implemented with Embedded Memory Blocks of FPGAs

Concurrent Error Detection for Combinational Logic Blocks Im...

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11th International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS)

作者： Andrzej Krasniewski Institute of Telecommunications Warsaw University of Technology Poland

A concurrent error detection (CED) scheme for combinational logic blocks implemented with embedded memory blocks (EMBs) available in today's FPGAs is proposed. The scheme guarantees the detection of each permanent or transient fault resulting in a single-bit error at the input or output of any component of the circuit. Extensions of the basic scheme aimed at increasing the set of target faults are also presented. For the examined benchmark circuits, an average overhead associated with the proposed CED scheme is 24.7%, whereas for the earlier presented CED techniques applicable to conventional gate-based designs, an average overhead for the same circuits is in the range of 60%. The proposed technique offers also lower speed degradation and lower extra power consumption than the techniques intended for conventional gate-based designs.

关键词： Field programmable gate arrays programmable logic arrays Circuit faults logic testing programmable logic devices logic circuits logic design Fault detection Flip-flops Circuit synthesis

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Multi-Dimensional Circuit and Micro-Architecture Level Optimization

Multi-Dimensional Circuit and Micro-Architecture Level Optim...

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8th International Symposium on Quality Electronic Design (ISQED 2007)

作者： Zhenyu (Jerry) Qi Matthew Ziegler Stephen V. Kosonocky Jan M. Rabaey Mircea R. Stan Charles L. Brown ECE Department University of Virginia Charlottesville VA USA IBM Thomas J. Watson Research Center Yorktown Heights NY USA BerkeleyWireless Research Center University of California Berkeley Berkeley CA USA

This paper studies multi-dimensional optimization at both circuit and micro-architecture levels. By formulating and solving the optimization problem with conflicting design objectives and multiple tunable knobs, it is revealed that the 'sensitivity balance' strategy proposed in recent works for performance-energy optimization is a special case of a general multi-dimensional optimization framework. The results derived in this paper help the understanding of efficient trade-off among multiple design objectives with multiple knobs. The example of an industrial control logic implemented in PLA shows 22% energy saving and 70% area reduction at the expense of 4% delay increase.

关键词： Design optimization Delay Tunable circuits and devices Space technology Threshold voltage Wireless sensor networks Industrial control logic design logic circuits programmable logic arrays

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Reconfigurable magnetologic computing using MRAM cells

Reconfigurable magnetologic computing using MRAM cells

引用

2007 International Conference on Electromagnetics in Advanced Applications (ICEAA 2007), vol.2

作者： A. Ney Experimentalphysik Universität Duisburg-Essen Duisburg Germany

A simple hardware concept for a programmable logic element based on a single magnetic random access memory (MRAM) cell is presented. It combines the inherent advantage of a non-volatile output with flexible functionality which has to be selected at run-time. A single MRAM cell can represent one out of up to ten logic functions, among them the four elementary functions AND, OR, NAND and NOR and the two more complex functions XOR and XNOR if bipolar currents are used. Based on recent developments of the MRAM technology, which uses the toggled switching mode, alternative concepts for real MRAM devices will be discussed. As a first application example, which takes advantage of the reprogrammability and non-volatility of the logic elements, a compact design of a magnetologic full adder is presented.

关键词： Hardware Reconfigurable logic programmable logic arrays programmable logic devices Random access memory Nonvolatile memory Runtime logic functions logic devices logic design

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logic Synthesis Method for FPGAs with Embedded Memory Blocks

Logic Synthesis Method for FPGAs with Embedded Memory Blocks

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2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008), vol.6

作者： Mariusz Rawski Bogdan J. Falkowski Tadeusz Luba Institute of Telecommunications Warsaw University of Technology Warsaw Poland School of Electrical and Electronic Engineering Nanyang Technological University Singapore

The paper presents a logic synthesis method oriented towards FPGA architectures with specialized embedded memory blocks. Existing methods do not ensure effective utilization of possibilities provided by these specialized embedded modules. The presented method, based on balanced decomposition, leads to much more effective implementations of digital systems in modern FPGA structures.

关键词： Field programmable gate arrays programmable logic arrays Paper technology Digital systems Design automation logic design Input variables logic devices Random access memory Finite impulse response filter

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Analysis on vapor field for the drought over Southwest in 2009–2010

Analysis on vapor field for the drought over Southwest in 20...

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International Conference on Remote Sensing, Environment and Transportation Engineering (RSETE)

作者： Xuchen Liu Ju Wang Qian Li Yi Li Institute of Meteorology People''s Liberation Army University of Science and Technology Nanjing China

ISBN: (纸本)9781424491728

By using the regional climate model RegCM3 this paper simulated the drought over Southwest China during 2009 and 2010. By using to the NCEP reanalysis data this paper analyzed the impact of the atmospheric precipitable water, the water vapor transport and the water vapor budget. The result showed that: atmospheric precipitable water was less about 20% than normal years during the drought. The meridional water vapor transport was more than normal years and there was no big difference between the zonal water vapor transport before December 2009, but the situation after January 2010 was just contrary to it: the zonal water vapor transport was more and the meridional water vapor transport was similar to the normal years. The synthetic function of the zonal and meridional water vapor transport caused the water payout more than normal years during the drought.

关键词： Atmospheric modeling Rivers Analytical models Floods Rain programmable logic arrays

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Improving the Electron Emission Properties of Ion-Beam-Synthesized Ag-SiO{sub}2 Nanocomposites by Pulsed Laser Annealing

Improving the Electron Emission Properties of Ion-Beam-Synth...

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20th International Vacuum Nanoelectronics Conference (IVNC 2007)

作者： W. M. Tsang A. A. D. T. Adikaari V. Stolojan B. Sealy S. P. Wong S. R. P. Silva Nanoelectronic Centre Advanced Technology Institute University of Surrey UK Research Laboratory of Electronics Massachusetts Institute of Technology Cambridge MA USA

Metal-dielectric nanocomposite hybrid systems have continuously attracted significant research interests from the community due to their unique optical [1], magnetic [2], electron field emission (FE) [3] and 'plasmonic' properties [4]. The properties of these nanocomposites are attributed to electrical inhomogeneity between the electrically conductive nanoclusters and the insulating dielectric matrix and are dependent on the characteristics of the metallic nanoclusters.

关键词： Electron emission Atomic force microscopy programmable logic arrays Iron Transmission electron microscopy Atomic measurements Force measurement Optical pulses Annealing Nanocomposites

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