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SOLUTION OF THE NETWORK ANALOG OF ONE-DIMENSIONAL FIELD-EQUATIONS USING THE LADDER METHOD

IEEE TRANSACTIONS ON EDUCATION 1985年第3期28卷 176-179页

作者： CHI, CW Department of Electronic Engineering City Polytechnic Hong Kong China

The one-dimensional diffusion equation is simulated by the impedance network analog which is then solved by the "ladder" method. The results are compared to solutions obtained by the analytical method.

关键词： Conductors Current density Mathematical model Impedance programmable logic arrays Wires Resistance

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A RANKING ALGORITHM FOR MOS CIRCUIT LAYOUTS

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 1987年第1期6卷 17-21页

作者： NEFF, CA NAIR, R IBM Thomas J. Watson Research Center Yorktown Heights NY USA

In the synthesis of digital circuits, one encounters the problem of identifying blocks which have been designed, so that there is no replication in the expensive effort of generating the physical layout of these blocks. We present a model for the synthesis of combinational logic into complex MOS circuits and present a ranking and unranking procedure to characterize the layout of each complex MOS circuit.

关键词： Integrated circuit synthesis Circuit synthesis logic circuits CMOS technology Digital circuits logic design programmable logic arrays Inverters Physics computing

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A NOVEL PEPTIDOGLYCAN-ASSOCIATED LIPOPROTEIN (PAL) FOUND IN THE OUTER-MEMBRANE OF PROTEUS-MIRABILIS AND OTHER GRAM-NEGATIVE BACTERIA

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JOURNAL OF BIOCHEMISTRY 1981年第4期89卷 1039-1049页

作者： MIZUNO, T Mitsubishi-Kasei Institute of Life SciencesMinamiooya Machida Tokyo 194

A novel peptidoglycan-associated lipoprotein (PAL) was found in the cell envelope of P. mirabilis. The apparent MW in sodium dodecyl sulfate (SDS) polyacrylamide gel was 18,000. The protein was present in the cell envelope in a form very closely, but not covalently, associated with the peptidoglycan layer. The protein was recovered predominantly from the outer membrane fraction after separation of the cell envelopes. [1-14C]Palmitic acid and [2-3H]glycerol were incorporated into the protein. The protein contained covalently linked fatty acids (.apprx. 3 mol of fatty acid per mol of protein). An unidentified compound was present in the hydrolysate of the protein. These properties, except for MW and non-covalent association with the peptidoglycan, showed resemblance to those of Braun''s lipoprotein. The protein was distinct from Braun''s lipoprotein in regard to amino acid composition. A similar peptidoglycan-associated lipoprotein (PAL) was present widely in the cell envelopes of various gram-negative bacteria. P. mirabilis contains .apprx. 12 times as much PAL as Escherichia coli. Antiserum against PAL of P. mirabilis was cross-reactive against PAL of E. coli but not against Braun''s lipoprotein of E. coli.

关键词： SHCBP1 gene programmable logic arrays Cell wall Fatty Acids Molecular weights LRIT1 gene Protein Peptidoglycan lipoproteins outer membrane

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MIS - A MULTIPLE-LEVEL logic OPTIMIZATION SYSTEM

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 1987年第6期6卷 1062-1081页

作者： BRAYTON, RK RUDELL, R SANGIOVANNIVINCENTELLI, A WANG, AR Department of Electrical Engineering and Computer Sciences University of California Berkeley CA USA

MIS is both an interactive and a batch-oriented multilevel logic synthesis and minimization system. MIS starts from the combinational logic extracted, typically, from a high-level description of a macrocell. It produces a multilevel set of optimized logic equations preserving the input-output behavior. The system includes both fast and slower (but more optimal) versions of algorithms for minimizing the area, and global timing optimization algorithms to meet system-level timing constraints. This paper provides an overview of the system and a description of the algorithms used. Included are some examples illustrating an input language used for specifying logic and don't-cares. Parts on an industrial chip have been re-synthesized using MIS with favorable results as compared to equivalent manual designs.

关键词： CMOS logic circuits logic arrays Timing programmable logic arrays logic design Minimization logic circuits CMOS technology Macrocell networks Equations

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FAST 2 DIMENSIONAL CLUSTER FINDING IN PARTICLE PHYSICS

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 1989年第1期36卷 370-374页

作者： BAIRD, SA BAINS, N CAMPBELL, D CAWTHRAW, M CHARLTON, D COUGHLAN, J EISENHANDLER, E ELLIS, N FENSOME, I FLYNN, P GALAGADERA, S GARVEY, J GRAYER, G GREGORY, J HALSALL, R JIMACK, MP JOVANOVIC, P KENYON, IR LANDON, M SHAH, TP STEPHENS, R RUTHERFORD APPLETON LAB DIDCOT OX11 0QXOXONENGLAND UNIV LONDON QUEEN MARY COLL LONDON E1 4NSENGLAND

The cluster finding module (CFM) is part of the UA1 trigger processor. The CFM detects and counts two-dimensional clusters of electromagnetic particles. This process requires 75 ns for detection of either isolated or nonisolated clusters and 75 ns to count them. This is equivalent to a peak computational rate of 11000 MIPS (million instructions per second) per module (3000 MIPS average). The required high logic density and speed are achieved by using programmable array logic devices within a pipelined system. The design has been strongly influenced by the need for in-situ computer testing.< >

关键词： Testing Laboratories logic devices programmable logic arrays Hardware Registers Educational institutions Protons Particle beams Colliding beam devices

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A NEW CYLINDRICAL SPECT ANGER CAMERA WITH A DECENTRALIZED TRANSPUTER BASED DATA ACQUISITION-SYSTEM

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 1991年第2期38卷 654-658页

作者： LARSSON, SA BOHM, C CARNEBRINK, T HOVANDER, B LARSSON, P BERGQVIST, M ERIKSSON, L ISRAELSSON, A WIDEN, L UNIV STOCKHOLM DEPT PHYSS-10691 STOCKHOLMSWEDEN

The camera will consist of a 18 cm long and 30 cm diam. cylindrical ring scintillator of Na(Tl)I surrounded by 5 layers of 21 optically coupled photomultipliers (PMT). A position encoding algorithm has been developed, which only utilizes information form PMTs close to the event. The local positioning algorithm permits partitioning of the data acquisition system into 105 loosely coupled local acquisition units, one for each PMT. The units uses a transputer and a programmable gate array for control and logic. The system uses a three level analog/digital/software trigger system. The first two are local. One triggers at a given total energy level, while the other triggers if the event is deemed likely to have originated from within the local units own territory. A third level, contains more complex tests to remove multiple recording of events. Utilizing high speed transputers as processing elements, the system will resolve multiple events, allow high count rates and on-line corrections.

关键词： Cameras Partitioning algorithms programmable logic arrays High speed optical techniques Optical coupling Photomultipliers Encoding Data acquisition programmable control Software systems

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Traffic Dynamics Evaluation for the Future NFV Deployment

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 2020年第10期67卷 2214-2218页

作者： Jiang, Zhongyuan Chen, Xi Ma, Jianfeng Zhang, Yasheng Gu, Jujuan Xidian Univ Sch Cyber Engn Xian 710071 Peoples R China Sci & Technol Commun Networks Lab Shijiazhuang 050081 Hebei Peoples R China 54th Res Inst CETC Shijiazhuang 050081 Hebei Peoples R China

To adapt the rapid upgradation of the communication technology (e.g., from 5G to 6G) and reduce the redeployment cost, the Network Functions Virtualization (NFV) is regarded as a key technology to reduce the capital expenditures (CAPEX) and operating expenses (OPEX) by decoupling traditional network functions from proprietary hardware appliances to software appliances. However, with increasing data transmission requirements, the limited traffic capacity is still the bottleneck of NFV network and strongly related to three aspects: 1) NFV network structure construction;2) resource allocation;3) routing design for packet navigation. In this brief, we first present a preferential link attachment mechanism to model the growth evolution of the NFV network. Secondly, we propose to efficiently allocate virtual resource for every Virtualized Network Fucntion (VNF). Thirdly, we propose a new routing mechanism to fully make use of the network resource and enhance the traffic capacity. Finally, extensive experiments demonstrate that our integrated solution systematically formulates the traffic dynamics for the future NFV deployment.

关键词： Routing Hardware Virtualization programmable logic arrays Resource management Physical layer Communication networks Network functions virtualization (NFV) traffic capacity resource distribution routing algorithm

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MINIMUM MEMORY BUFFERS IN DSP APPLICATIONS

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ELECTRONICS LETTERS 1994年第6期30卷 469-471页

作者： ADE, M LAUWEREINS, R PEPERSTRAETE, JA ESAT Katholieke Univ. Leuven Heverlee

The authors compute the minimum required buffer sizes that still guarantee the construction of a deadlock-free static schedule in synchronous multirate data flow graphs. The results are applicable to the rapid prototy... 详细信息

关键词： DIGITAL SIGNAL PROCESSING programmable logic arrays MULTIRATE SIGNAL PROCESSING

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HARDWARE IMPLEMENTATION OF AN ARTIFICIAL NEURAL-NETWORK USING FIELD-programmable GATE arrays (FPGAS)

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 1994年第6期41卷 665-667页

作者： BOTROS, NM ABDULAZIZ, M Department of Electrical Engineering Southem Illinois University Carbondale IL USA

In this paper we present a hardware implementation of a fully digital multi-layer perceptron artificial neural network using Xilinx Field programmable Gate arrays (FPGAs). Each node is implemented with two XC3042 FPGAs and a 1K x 8 EPROM. Training is done off-line on a PC. We have tested successfully the performance of the network.

关键词： Field programmable gate arrays Neural network hardware Artificial neural networks Very large scale integration programmable logic arrays Computational modeling Medical simulation Software packages Multilayer perceptrons EPROM

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MDA: Revenge of the modelers or UML utopia?

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IEEE SOFTWARE 2004年第3期21卷 15-17页

作者： Thomas, D Carleton Univ Ottawa ON K1S 5B6 Canada Univ Queensland St Lucia Qld 4067 Australia

The OMG's Model Driven Architecture (MDA) is an ambitious effort to build programs from models using model transformations. The author believes that model-driven agile development is an effective software development practice, but he has concerns about the proposed MDA. Modeling is at the core of many disciplines, but it is especially important in engineering because it facilitates communication and constructs complex things from smaller object-oriented languages. Many have viewed software development as the development and refinement of models. Models facilitate the understanding, simulation, and emulation of the artifacts under development. Depending an model paradigms and cognitive styles, engineers express models using diagrams, structured text, and storyboards of one form or another. Software modelers depend on and use engineering analogies but often fail to understand them. Software engineering welcomed the OMG's intervention, just as other, more mature disciplines have welcomed similar interventions. The good in UML is that it provides a common and useful visual notation for describing many of the software artifacts used in modern object-oriented analysis, design, and development. INSET: Related Work..

关键词： object-oriented methods object-oriented programming program compilers software architecture specification languages MDA tool Model Driven Architecture UML domain specific language domain-oriented programming model engineering model-driven development pla object oriented programming programmable logic arrays Utopias SMDA Retaliation Model-driven development object orientation Software architecture UML compilers specification description language MDA(computers)

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