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IEEE TRANSACTIONS ON NANOBIOSCIENCE 2025年第1期24卷 63-69页

作者： Nair, Parvathy Amreen, Khairunnisa Ponnalagu, R. N. Goel, Sanket Birla Inst Technol & Sci BITS Pilani Dept Elect & Elect Engn Hyderabad Campus Hyderabad 500078 India Birla Inst Technol & Sci BITS Pilani MEMS Microfluid & Nanoelect MMNE Lab Hyderabad Campus Hyderabad 500078 India

The identification of biomarkers has significant benefits for early disease diagnosis and treatment. Hence, there is an increasing demand for low-cost, disposable point-of-care diagnostic devices for rapid and specific biomarker detection, with good sensitivity and range. Interdigitated electrodes (IDEs) are among the most widely used transducers, especially in chemical and biological sensors, because of their high sensitivity, low cost, and straightforward manufacturing procedure. In this work, a simple 3D printed IDE structure has been developed for cardiac troponin I detection to indicate the risk of acute myocardial infarction (AMI). IDEs have been fabricated using 3D printing technique and the electrically conductive composite polylactic acid (PLA) filament being utilized for the fabrication of electrodes. The demonstrated cardiac troponin I sensor has a calculated quantification limit and detection limit of 0.233 ng ml( -1) and 76.97 pg ml( -1) , respectively which are clinically significant ranges for AMI identification. Electrochemical analytical techniques, such as electrochemical impedance spectroscopy (EIS) and cyclic voltammetry (CV), were carried out for the detection of analyte concentration. Furthermore, using this fabrication methodology IDEs can be fabricated for under US $0.4 which can be utilized to detect several other biomarkers.

关键词： Electrodes programmable logic arrays Antibodies Chemicals Antigens Three-dimensional displays Surface morphology 3D printed electrode interdigitated electrodes cardiac biomarker cardiac troponin I

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Introduction of programmable gate arrays into an introductory logic design course

Introduction of programmable gate arrays into an introductor...

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Frontiers in Education (FIE) Conference

作者： S.L. Wood Dept. of Electr. Eng. Santa Clara Univ. CA USA

This paper describes the staged introduction of design capture tools and field programmable gate array technology into an introductory logic design class required for all electrical engineering, computer engineering, and computer science majors. This gradual approach used consistently throughout the quarter does not interfere with the continuity of the course and does not require an unreasonable amount of student time to be devoted to learning the design tools. This is attainable when the goal is exposure of the student to the power and limitations of modern design approaches rather than attempting to achieve the level of an expert user.

关键词： programmable logic arrays logic design Design engineering Design methodology Testing Investments Computer science education Educational programs Educational technology Field programmable gate arrays

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'Wireless Bimboards'-the use of programmable gate arrays in a logic design laboratory

'Wireless Bimboards'-the use of programmable gate arrays in ...

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Midwest Symposium on Circuits and Systems (MWSCAS)

作者： N. Mikhail J. Knight Electronics Department Carleton University Ottawa ONT Canada

The results of converting a digital electronic laboratory using 74 chips wired on IC layout boards, to Xilinx(R) logic cell array (LCA) programmable gate arrays, are described. The LCAs expose students to modern ASIC implementation methods and consume less student time for wiring and noneducational debugging. However, to realize these benefits, one should be prepared for significant start-up costs and several man months of preparatory work.< >

关键词： programmable logic arrays logic design Laboratories Wiring Debugging Read-write memory Switches Integrated circuit layout Digital integrated circuits logic circuits

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The Exemplar logic synthesis system: a logic synthesis tool for field programmable gate arrays

The Exemplar Logic synthesis system: a logic synthesis tool ...

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Annual IEEE International Conference and Exhibit ASIC

作者： M. Ligthart R. Ranauro Exemplar Logic Inc. Berkeley CA USA

High density programmable logic devices require dedicated synthesis algorithms to maximize the utilization of the device resources. The authors discuss the impact of device architectures on logic synthesis algorithms, and show how device specific optimization allows designers to design for multiple architectures from a common design description. The Exemplar logic synthesis system combines industry standard design entry methods with architecture specific optimization algorithms. This power lets designers easily migrate PLD, FPGA, or ASIC designs to FPGAs or ASICs, and gives designers using top-down design techniques the flexibility to explore speed versus area tradeoffs between FPGAs and ASICs early in the design cycle.< >

关键词： programmable logic arrays Field programmable gate arrays logic devices programmable logic devices Algorithm design and analysis logic programming logic design Application specific integrated circuits Design optimization logic arrays

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logic decomposition for programmable gate arrays

Logic decomposition for programmable gate arrays

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Euro ASIC

作者： T. Luba M. Markowski B. Zbierzchowski Institute of Telecommunications Warsaw University of Technology Warsaw Poland Inst. of Telecommun. Warsaw Univ. of Technol. Poland

In this paper an effective decomposition algorithm for mapping of logic functions onto FPGAs is proposed. The algorithm exploits the symbolic decomposition concept to find FPGA based implementation with a minimal numb... 详细信息

关键词： programmable logic arrays Boolean functions Field programmable gate arrays Input variables logic functions logic arrays Gold Calculus Cost function

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A one gigaFLIPS fuzzy logic control chip using only combinational logic and Field programmable Gate arrays

A one gigaFLIPS fuzzy logic control chip using only combinat...

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IEEE Region 5 Annual Technical Conference

作者： Lars Terum Brian Hernmelman ElisAS Norway Electrical and Computer Engineering Dept. South Dakota School of Mines and Technology Rapid City SD

A real-time fully parallelized fuzzy logic control chip has been designed and implemented in a Xillinx Spartan IIe Field programmable Gate Array. The current design handles two inputs and one output. Five membership functions are used to fuzzify each input signal, and five membership functions are used to defuzzify the output. Mamdani fuzzy inference is used to evaluate the 25 rules in the rule matrix. Two defuzzification schemes, weighted average and Hemmelman's average have been implemented and evaluated. Fuzzification, rule evaluation, and defuzzification are all performed in a parallel architecture that utilizes only combinational logic. Testing indicates a worst case delay of approximately 25 ns, although typical propagation delays are approximately 18 ns. The worst case delay corresponds to an effective throughput of one billion fuzzy logic inferences per second (one gigaFLIPS).

关键词： Fuzzy logic programmable logic arrays programmable control Field programmable gate arrays Propagation delay Performance evaluation Parallel architectures Testing Delay effects Throughput

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logic synthesis for programmable gate arrays

Logic synthesis for programmable gate arrays

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Design Automation Conference

作者： R. Murgai Y. Nishizaki N. Shenoy R.K. Brayton A. Sangiovanni-Vincentelli Department of Electrical Engineering and Computer Sciences University of California Berkeley CA USA

The problem of combinational logic synthesis is addressed for two interesting and popular classes of programmable gate array architecture: table-lookup and multiplexer-based. The constraints imposed by some of these architectures require new algorithms for minimization of the number of basic blocks of the target architecture, taking into account the wiring resources. The presented algorithms are general and can be used for both of the above-mentioned architectures.< >

关键词： programmable logic arrays Wiring Electronics packaging logic functions Costs Integrated circuit interconnections logic arrays Computer architecture Minimization methods Prototypes

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Secure Medical Image Transmission Using the RLCD Algorithm

Secure Medical Image Transmission Using the RLCD Algorithm

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Sentiment Analysis and Deep Learning (ICSADL), International Conference on

作者： C Sheeba Joice S Hitha Shanthini K Harsha S Gopika Department of Electronics and Communication Engineering Saveetha Engineering College Chennai India

ISBN: (数字)9798331523923

ISBN: (纸本)9798331523930

As digital platforms increasingly manage sensitive medical information, securing the transmission of medical images is essential to maintain confidentiality and data integrity. This project introduces an efficient and secure cryptographic framework specifically designed for medical image encryption using Reversible logic Cryptography Design (RLCD). The approach incorporates Linear Feedback Shift Registers (LFSR) combined with XOR gates, enabling low-power and high-speed encryption and decryption to protect patient data without sacrificing performance. By integrating reversible logic gates, this system effectively reduces energy dissipation and prevents information loss, making it well-suited for applications where data accuracy is critical. Implemented in Verilog HDL and deployed on a Field programmable Gate Array (FPGA), this design provides a robust solution to address the unique security demands in medical imaging.

关键词： Sentiment analysis programmable logic arrays logic gates Hardware Software Encryption Hardware design languages Field programmable gate arrays Biomedical imaging Python

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FPGA-Based Adaptive Traffic Management System for Optimizing Five-Point Intersection Flow

FPGA-Based Adaptive Traffic Management System for Optimizing...

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International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)

作者： Samit Karmakar Supratim Nandi Atalanta Pal Oishi Banerjee Wrishav Das Sumit Barnwal Soumik Kumar Kundu Electronics & Communication Engineering Dept. Institute of Engineering & Management University of Engineering & Management Kolkata India

ISBN: (数字)9798331520762

ISBN: (纸本)9798331520779

The present invention relates to an FPGA driven traffic management system specifically designed for five-point intersections, which are notably complex due to their unique traffic flow patterns. FPGA is field programmable gate of array basically used to implement digital virtual logic into real hardware. Here FPGAs are utilized to process and control this system periodically every 360 sec durations. This innovative approach not only improves traffic flow and reduces waiting times but also contributes to handle emergency like situation and according to that manipulate signals. The adaptability of the invention to diverse traffic conditions makes it a robust solution for urban traffic management challenges.

关键词： Technological innovation Costs VHDL Pedestrians Process control programmable logic arrays logic gates Traffic control Software Field programmable gate arrays

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Microencapsulation of capsaicin by solvent evaporation method and thermal stability study of microcapsules

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COLLOID JOURNAL 2013年第1期75卷 26-33页

作者： Wang, Jincheng Dong, Xingyu Chen, Sihao Lou, Jianzhong Shanghai Univ Engn Sci Sch Chem & Chem Engn Shanghai 201620 Peoples R China N Carolina Agr & Tech State Univ Coll Engn Greensboro NC 27411 USA

With polylactic acid (PLA) as shell and capsaicin as core substances, microcapsules were prepared based on solvent evaporation method. The orthogonal test was used to analyze the effects of the process conditions such as polyvinyl alcohol and PLA concentrations, stirring rate, and oil/water ratio on the particle size of the microencapsulated capsaicin (MC) agents. The chemical composition, morphology and size distribution of the microcapsules prepared by the most satisfactory conditions were analyzed by Fourier transform infrared spectroscopy, laser light scattering, and scanning electron microscopy. The MC agents had a mean diameter of 3-5 mu m. The thermal properties of the MC agents were measured by differential scanning calorimetry and thermogravimetric analysis, it was demonstrated that the thermal stability of the MC agents was changed or even improved by the encapsulated PLA over the surface, when compared with similar parameters of the uncovered capsaicin. The in vitro release profile suggested that the microcapsules could be a suitable material for controlled release of capsaicin.

关键词： Agents programmable logic arrays Microcapsules evaporation Particle Size size distribution stability study mean diameter SOLVENT EVAPORATION Capsaicin Microencapsulation

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