Recent developments suggest both plausible fabrication techniques and viable architectures for building sublithographic programmablelogic Arrays using molecular-scale wires and switches. Designs at this scale will se...
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This paper describes our state-of-the-art design flow used for specification, implementation and verification of a 10 million gates ASIC System-on-Chip (SoC) for a Sonet/SDH application. We present our tools and metho...
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ISBN:
(纸本)3540223770
This paper describes our state-of-the-art design flow used for specification, implementation and verification of a 10 million gates ASIC System-on-Chip (SoC) for a Sonet/SDH application. We present our tools and methodologies currently used and/or being developed for a multisite ASIC design project from the first specification up to the gate level netlist: our multi-site data management environment VHDLDevSys, our multi-use and re-use library ADK-Lib and our multi-platform VHDUC++ simulation/verification environment PROVerify together with the employment of formal methods.
The proceedings contain 115 papers from the 2004 23rd IEEE Convention of Electrical and Electronics Engineers in Israel, Proceedings. The topics discussed include: a neural control model for bimanual rhythmic movement...
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The proceedings contain 115 papers from the 2004 23rd IEEE Convention of Electrical and Electronics Engineers in Israel, Proceedings. The topics discussed include: a neural control model for bimanual rhythmic movements;iterative decoding of coded Tomlinson-Harashima precode signals;on soft decision decoding of products codes;data transmission in transport telematics;compact comparison of competing software design;a clustering approach for exploring the interest structure;metallic contamination in silicon processing;automated method for doppler echocardiography image analysis;speed and position estimation of brushless DC motor in very low speeds;and basic turbine values from data of fault events.
EDN's programmable-logic directory highlights various architectures available for the next generation of designs. The 'term logic' devices subdivides into discrete logic, simple PLDs and complex PLDs, FPGA...
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EDN's programmable-logic directory highlights various architectures available for the next generation of designs. The 'term logic' devices subdivides into discrete logic, simple PLDs and complex PLDs, FPGAs, and gate array, structured, standard-cell, and and custom-cell ASICs. Semiconductor vendors have developed unique PLDs and FPGAs to address intersections of performance, power, integration, and cost targets. Compared with ASICs, programmable-logic devices have shorter leadtimes, lower upfront NRE (nonrecurring-engineering) charges, and no minimum-order quantities. The directory loosely uses the term 'ASIC plus programmablelogic' to describe FPGAs and CPLDs with elaborate and fixed hard functions, such as CPU and associated peripheral cores.
The implementation of programmablelogic controller (PLC) software in the pharmaceutical companies is discussed. The PLC control systems in pharmaceutical industry works with packaging machines, purified water systems...
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The implementation of programmablelogic controller (PLC) software in the pharmaceutical companies is discussed. The PLC control systems in pharmaceutical industry works with packaging machines, purified water systems and air handling units. This control system consists of hardware, software and network components together with controlled functions and associated documentations. The implementation of PLC software helps in the automation and efficient process control in pharmaceutical plants.
A signal interpreted Petri nets (SIPN) based method for design and analysis of the reconfigurable logic controller (RLC) is presented to meet the needs of reconfigurable manufacturing systems (RMS). Hierarchy, modular...
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A signal interpreted Petri nets (SIPN) based method for design and analysis of the reconfigurable logic controller (RLC) is presented to meet the needs of reconfigurable manufacturing systems (RMS). Hierarchy, modularity, and interface technology are used to construct an open architecture for the RLC. An analysis method combining reachability graphs method and reduction technique is established to formally verify SIPN models following the designed steps. The transparency metrics are employed to evaluate the validity of models and the principle for reconfigurability analysis of the RLC is given. Subsequently, the proposed method is applied to a case study on logic control for a reconfigurable assembly line. The results show that the designed RLC is form-correct, valid, and reconfigurable. Finally, a software platform for design, analysis, simulation, code generation of RLC, and logic control execution is proposed. CORBA (common object request broker architecture) component model specification is used to develop the software.
This paper reports preliminary results of an ongoing research project that demonstrates distributed architecture based on agents applied in the area of industrial automation. This architecture has been built to achiev...
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This paper reports preliminary results of an ongoing research project that demonstrates distributed architecture based on agents applied in the area of industrial automation. This architecture has been built to achieve the goals of improved survivability and readiness of US Navy shipboard systems. We show benefits of multiagent systems in the area where flexibility, survivability, and scalability are required. We present the architecture of multi-agent system, internal structure of agent, planning technique based on plan templates, fault-tolerant structure of middle-agents, and development environment for agents.
A device was developed for experiments on the controlled heating of a thin wire probe immersed in the substance being analyzed, with penetration into the region of short-lived (superheated) states of the substance. Th...
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A device was developed for experiments on the controlled heating of a thin wire probe immersed in the substance being analyzed, with penetration into the region of short-lived (superheated) states of the substance. The thermostabilization of the probe, pulse-heated to the selected temperature Tpl(t > tpl), is described. Using the iteration method, the software fits the coefficients of the heating function to reproduce the required temperature regime with an error of 3 at a characteristic time of 10 μs.
Based on the concept of place invariants of Petri Nets, supervisors for discrete-event systems can be synthesized so as to have a set of operation constraints respected by the controlled system. The implementation of ...
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Based on the concept of place invariants of Petri Nets, supervisors for discrete-event systems can be synthesized so as to have a set of operation constraints respected by the controlled system. The implementation of this technique in a manufacturing cell is presented, with detailed description of modeling, supervisor design and programming, in STL language, of the PLC which controls the cell. Important issues such as: supervisor permissiveness, comparative analysis with techniques based on automata, as well as the systematization of the procedure for application to other systems are also discussed.
SCADA systems use many modern programming technologies. The amount of knowledge needed to use them steadily grows. In the paper is presented the application, which shows the user how to solve many industry problems us...
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SCADA systems use many modern programming technologies. The amount of knowledge needed to use them steadily grows. In the paper is presented the application, which shows the user how to solve many industry problems using modern programming tools. The application has been developed in iFIX 3.5 HMI/SCADA Software for Efficient Manufacturing made by GE Fanuc firm and is used during iFIX training courses. It consists of almost 1000 pictures, which include many programs and present step by step how to use iFIX tools by examples in graphical way. Many pages of iFIX documentation are shown on only several pictures, which enables easily to memorize even complex algorithms.
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