This paper gives a summary of a project, which deals with methods for the proof of the demanded properties of user-written control software. Although these methods based on formal methods they are covered with user-fr...
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ISBN:
(纸本)0780365836
This paper gives a summary of a project, which deals with methods for the proof of the demanded properties of user-written control software. Although these methods based on formal methods they are covered with user-friendly interfaces. The document displays the modelling of a control-system, which consists of a programmablelogic controller (PLC), a user program and the environment, it demonstrates the description of the requirements for this system, and it explains, how we prove these requirements at the generated model.
The paper presents a resource control framework for active IP networks. Generic router resource abstractions are discussed to supporting network programming by a wide variety of active network services. Dynamic partit...
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ISBN:
(纸本)0769509126
The paper presents a resource control framework for active IP networks. Generic router resource abstractions are discussed to supporting network programming by a wide variety of active network services. Dynamic partitioning is described as an adaptive bandwidth allocation scheme to provide safe resource access and efficient multiplexing. Policy in the form of code is use to enable customization by operators via CORBA interface. The framework is a key module in an enhanced ORE, a middleware platform for active services, and can be dynamically installed as downloadable objects.
The goal of this paper is to present the design methodology for the modelling and synthesis of discrete-event controllers for compact, fast and reliable embedded systems, using related Petri net theory, rule-based sys...
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ISBN:
(纸本)0780366069
The goal of this paper is to present the design methodology for the modelling and synthesis of discrete-event controllers for compact, fast and reliable embedded systems, using related Petri net theory, rule-based system theory (conditional mathematical logic), and Hardware Description Languages (VHDL, Verilog), The well-structured specification, which is represented in the human-readable logic language, has a direct impact on the validation, formal verification and implementation of Application Specific logiccontrollers (ASLC) mapped into reconfigurable logic devices (FPGA). Reprogrammable logic controllers (RLC) may replace traditional PLCs in many industrial applications.
This paper describes the application of binary and multi-valued SPFD-based wire removal techniques for circuit implementations utilizing networks of PLAs. It has been shown that a design style based on a multi-level n...
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This paper describes the application of binary and multi-valued SPFD-based wire removal techniques for circuit implementations utilizing networks of PLAs. It has been shown that a design style based on a multi-level network of approximately equal-sized PLAs results in a dense, fast, and crosstalk-resistant layout. Wire removal is a technique where the total number of wires between individual circuit nodes is reduced, either by removing wires, or replacing them with other existing wires. Three separate wire removal experiments are performed. Either wire removal is invoked before clustering the original netlist into a network of PLAs, or after clustering, or both before and after clustering. For wire removal before clustering, binary SPFD-based wire removal is used. For wire removal after clustering, multi-valued SPFD-based wire removal is used since the multi-output PLAs can be viewed as multi-valued single output nodes. We demonstrate that these techniques are effective. The most effective approach is to perform wire removal both before and after clustering. Using these techniques, we obtain a reduction in placed and routed circuit area of about 11%. This reduction is significantly higher (about 20%) for the larger circuits we used in our experiments.
In industrial practice it is much more common to control a process using logical control for discrete on/off states. As a result most industrial equipment designs use programmable logic controllers (PLCs). These contr...
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In industrial practice it is much more common to control a process using logical control for discrete on/off states. As a result most industrial equipment designs use programmable logic controllers (PLCs). These controllers support multiple control schemes such as Boolean logical control, sequential logic control, structured programming, linear controls, graphical interfaces, fuzzy logic, etc. A majority of engineering students are taught control of continuous systems using linear control theory. These courses often include topics such as step response and design of lead/lag controllers. In terms of the pedagogy, linear controls are less desirable for the mechanical engineering students because they are very difficult to implement in actual designs. The linear approach makes more sense for electrical engineering students who are familiar with the mathematical tools, and can implement the control system easily with common electronic components. This paper will describe a course, EGR 450 - Manufacturing Control Systems. The course includes lectures, laboratories and a project. This course uses rigorous design techniques and theoretical methods to teach industrial control to junior and senior engineering students. Topics include the design of basic combinatorial logic, sequential and state based logic, sensors and interfacing, communications and networking, analog I/O and PID control. This course has been very well received by students and local manufacturers.
We outline a methodology for system level test composition out of module level tests in the context of system-on-a-chip (SOC). The method can be utilized as soon as high level specifications are available providing av...
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This paper presents a process of converting A and B contacts in the ladder diagram (LD) into the Petri Net (PN). In order to represent A and B contacts in the LD program with the PN graph, the concept of preservation ...
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This paper presents a process of converting A and B contacts in the ladder diagram (LD) into the Petri Net (PN). In order to represent A and B contacts in the LD program with the PN graph, the concept of preservation arc is introduced. The resulting PN is then compared with the conventional PN by using the timing chart. The state equation for A and B contacts is constructed in the transition vector. As using the equation, each state equation about the LD program is created, such as A contact function and B contact function. The state equation is validated using each example.
The development of virtual machine and simulation software, system elements and architecture, typical manufacturing machines and laboratory procedures is discussed. A human machine interface software package with a br...
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The development of virtual machine and simulation software, system elements and architecture, typical manufacturing machines and laboratory procedures is discussed. A human machine interface software package with a broad industrial base is used to stimulate the manufacturing machine and provide students with a virtual model of the machine to measure the success of their control programs. The singular disadvantage is that some systems are difficult to model with the limited programming commands present in the HMI software. The next step in the development of this application is the development of additional trainers including a mat.
The advantages and disadvantages of replacing discrete logic with programmablelogic in introductory digital logic courses are discussed. The trend of replacing the traditional SSI/MSI breadboarded digital logic desig...
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The advantages and disadvantages of replacing discrete logic with programmablelogic in introductory digital logic courses are discussed. The trend of replacing the traditional SSI/MSI breadboarded digital logic design projects with design projects utilizing more complex programmable integrated circuits (IC) is also discussed. Utilizing complex programmable IC such as PLA and FPGA, more projects can be implemented. Modern programming tools allow the specification of quite complex circuits from a graphical schematic or procedural hardware description.
A complete digitally - programmable analogue Fuzzy logic Controller (FLC) is presented. The design of some new functional blocks and the improvement of others aim towards speed optimization with a reasonable accuracy,...
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A complete digitally - programmable analogue Fuzzy logic Controller (FLC) is presented. The design of some new functional blocks and the improvement of others aim towards speed optimization with a reasonable accuracy, as it is needed in several analogue Signal Processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and successfully tested using a standard CMOS 2.4 μ technology showing good agreement with the expected performances, namely: 5.26 Mflips (Mega fuzzy logic inferences per second) at the pin terminals (CL = 13 pF), 933 μW power consumption per rule (Vdd = 5 V) and 5 to 6 bits of precision. Since the circuit is intended for a subsystem embedded in an application chip (CL≤5 pF) over 8 Mflips may be expected.
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