Hitachi has developed several new nodules for its small-end programmablelogic controller (PLC) of the EH-150 series. The modules have a processing speed of basic commands, programming-memory capacity, and improved co...
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Hitachi has developed several new nodules for its small-end programmablelogic controller (PLC) of the EH-150 series. The modules have a processing speed of basic commands, programming-memory capacity, and improved communication functionality.
programmable logic controllers (PLCs) of the MICRO-EH series are of all-in-one-type with various inputs and outputs in a compact body. These PLCs enable controlling conveyers, packing machines, assembling machines, ai...
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programmable logic controllers (PLCs) of the MICRO-EH series are of all-in-one-type with various inputs and outputs in a compact body. These PLCs enable controlling conveyers, packing machines, assembling machines, air-controlling machines, and other controlling systems.
The ARC Advisory Group, Dedham, Mass. has reported $6 billion worldwide sales of PLCs, I/O and related products and services. The reason for the success of older PLCs over new generation PLCs is that they are robust, ...
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The ARC Advisory Group, Dedham, Mass. has reported $6 billion worldwide sales of PLCs, I/O and related products and services. The reason for the success of older PLCs over new generation PLCs is that they are robust, can survive in hazardous conditions and there is no downtime as a result of PLC failure. Modern PLCs are embedding ethernet and web server capability into their hardware which ensures full compatibility with TCP/IP, SMP and FTP protocols.
The use of programmablelogic devices (PLD) to achieve greater system-level integration with the ability to implement networking functions and memory blocks was presented. The approach extended the capability to use t...
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The use of programmablelogic devices (PLD) to achieve greater system-level integration with the ability to implement networking functions and memory blocks was presented. The approach extended the capability to use the communication link to transmit the configuration data to update the PLD remotely. The system containing a PLD with an embedded processor core to support the Transmission Control Protocol (TCP)/Internet Protocol (IP) was also discussed. It was found that the ability to browse the PLD made revision control simpler by making information about the system easily accessible.
With the increasing use of computers in manufacturing, the quality of the production process becomes increasingly dependent on the software used in these systems. This paper describes the use of Lamport's Temporal...
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With the increasing use of computers in manufacturing, the quality of the production process becomes increasingly dependent on the software used in these systems. This paper describes the use of Lamport's Temporal logic of Actions (TLA) for the modular verification of programmable logic controllers (PLCs). First, a way to fonnulate abstract specifications for function blocks as defined in IEC 1131 is suggested. Based on these abstract specifications, the verification of systems consisting of many function blocks in a modular way is explained.
In this paper a method is proposed to translate control algorithms for manufacturing systems designed in Sequential Functional Charts into the Ladder Diagram language typical of programmable logic controllers. The met...
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In this paper a method is proposed to translate control algorithms for manufacturing systems designed in Sequential Functional Charts into the Ladder Diagram language typical of programmable logic controllers. The method preserves the structure of SFCs : In the resulting program each instruction is directly related to the evaluation of a transition. to the update of the marking or to the execution of an action. The method transparently handles the conversion of macro-actions thus allowing exploitation of hierarchical SFCs in the design phase. A case study is presented to illustrate the technique.
This paper examines the effect of scan time (S/T) of programmable logic controllers (PLCs) on cycle time (C/T). S/T is considered an internal feature of the PLC, and it becomes economically impracticable to examine di...
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This paper examines the effect of scan time (S/T) of programmable logic controllers (PLCs) on cycle time (C/T). S/T is considered an internal feature of the PLC, and it becomes economically impracticable to examine different PLCs to vary scan time and to monitor the effect on cycle time. Although the relationship between the two parameters is expected to differ in linear proportion, an optimum S/T region exists beyond which the rate of C/T change decreases. This region of scan time is particularly important for practitioners because more investment in the processor's speed might not achieve convenient reduction in cycle times. The effect of scan time variation on discrete event processes has been investigated during this research, and factors influencing cycle time have been identified. Also, using intelligent decision analysis tools in engineering has been considered through associated work in which the analytic hierarchy process (AHP) and fuzzy logic have been employed in an intelligent system. In this paper, different criteria that affect the scanning time of a PLC are examined. The methods use a multiple-criteria decision-making tool, called AHP (analytic hierarchy process), that gives a prioritized rank of alternatives that contribute to those criteria.
The logic control program is usually specified by drawing the Petri net in terms of interface with the electro-mechanical devices and the environment of the system. In such case it is not immediately evident that the ...
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ISBN:
(纸本)0780366069
The logic control program is usually specified by drawing the Petri net in terms of interface with the electro-mechanical devices and the environment of the system. In such case it is not immediately evident that the control system behaves in a satisfactory way. Industrial engineers prefer frequently a form of specification, like interpreted Petri Net, Sequential Function Chart (SFC), Grafeet or Grafehart. In opposite, some popular techniques are informal and do not provide means to validate the design. In the paper, modelling, analysis and synthesis of logic controller described by Petri nets is presented. Additional, the use of Design/CPN system for modelling, testing and analysis of logiccontrollers described by means of coloured, interpreted Petri nets is shown. The proposed methods are especially use I in designing of Industrial Application Specific Lo Controller (ASLC) with FPGA.
Petri nets are able to express the causality as well as the concurrency of a control algorithm. To model logiccontrollers Signal Interpreted Petri Nets (SIPN) show good properties. In SIPN the firing of a transition ...
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ISBN:
(纸本)0780355199;0780355202
Petri nets are able to express the causality as well as the concurrency of a control algorithm. To model logiccontrollers Signal Interpreted Petri Nets (SIPN) show good properties. In SIPN the firing of a transition depends on input signals from the environment and the SIPN influences the environment via output signals. Since the function of a logic controller is basically determined by software, the question of software quality arises in this area. ISO/IEC 9126 [ISO 1991] defines six characteristics of software that can be used as quality criteria. In [FREY AND LITZ 2000] the six characteristics are set in the framework of controller design: The functionality and reliability of the software rely on the correctness of the algorithm. In this contribution criteria for formal correctness of SIPN control algorithms are given and it is shown how they can be evaluated using the SIPN reachability graph. Due to a close relation between Sequential Function Chart (SFC) according to IEC 1131-3 standard [IEC 1992] and SIPN the criteria are also valid for SFC.
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