The paper discusses the design process of a programmablelogic controller implemented by means of FPGA device. Designed PLC is to be compliant with EN 61131-3 standard. Diiferent aspects of instruction list and hardwa...
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The paper discusses the design process of a programmablelogic controller implemented by means of FPGA device. Designed PLC is to be compliant with EN 61131-3 standard. Diiferent aspects of instruction list and hardware architecture designing are presented, e.g. PLC structure with particular emphasis on central processing unit or memory map. Conclusions on an EN 61131-3 Standard are also shown. The developed PLC is implemented using FPGA device. This gives opportunity to develop interesting solutions. For example, using dual port RAM gives us opportunity to develop bit/word access without necessity of masking bits. Up to date FPGA devices have also disadvantage - there are no tri-state buffers inside. This is the reason for using multiplexers that control traffic on busses.
The main issue in controlling safety-critical systems such as nuclear power reactors or railway interlocking systems is to provide high safety and reliability where the risk ratio is at the highest level because small...
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The main issue in controlling safety-critical systems such as nuclear power reactors or railway interlocking systems is to provide high safety and reliability where the risk ratio is at the highest level because small errors might result in hazardous accidents (e.g., death or injury of many people). The N-version programming technique, where N-different modules run in parallel, can be used to improve the reliability and safety of such systems at the desired safety level. Decisions of N-different modules are then evaluated by another component, usually known as the voter, using different voting strategies. In the current study a bitwise voting strategy to evaluate module decisions that are based on safe-states of variables is proposed and possible synchronization problems between the modules are determined. Sequence diagrams and solutions for synchronization problems are also explained.
The process of photolithography uses light to imprint an image onto a wafer coated with photoresist in order to create integrated circuits or other technology such as read/write heads for hard drives. During this proc...
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The process of photolithography uses light to imprint an image onto a wafer coated with photoresist in order to create integrated circuits or other technology such as read/write heads for hard drives. During this process, reservoir switching units can fail to detect resist on the photolithography tool or the Millipore pump, thus introducing air into the resist lines and ultimately causing scrap due to poor dispenses. This is difficult to detect via operator inspection. It is important to improve the dispense system of a photolithography coating tool because with the increasing cost of photoresist there is a need for less waste. There are more read/write heads on a wafer and larger wafers are being used;therefore, if the photolithography coating tool has a poor dispense which is not detected and a wafer is scrapped, this will increase manufacturing costs. By reducing the amount of scrap and reworks there will be a reduction in the time to produce a single wafer, thus reducing the overall production costs of making a single read/write head and staying more competitive in the hard drive market. This paper outlines a method for detecting empty resist bottles or air in the resist lines using programmablelogic controller (PLC) technology in conjunction with a relay dispense system to monitor the dispense system from a remote station, thereby improving the process and reducing the cost of manufacturing read/write heads. Overall there are less dispense errors and thus less rework and scrap, meaning that the wafer yield has improved and therefore the cost of manufacturing a read/write head has reduced and the time to market has improved. Due to the success of the PLC control system, it will be implemented across other coating tools in the factory.
This paper describes the course Systems for Supervision and Process Visualization that is conducted at the undergraduate studies of Mechatronics at University of Novi Sad, the scope, tasks, labs and hands on activitie...
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This paper describes the course Systems for Supervision and Process Visualization that is conducted at the undergraduate studies of Mechatronics at University of Novi Sad, the scope, tasks, labs and hands on activities. In addition, it presents the student evaluation of the course that provided valuable feedback for further improvements. (c) 2013 Wiley Periodicals, Inc. Comput Appl Eng Educ 23:54-62, 2015;View this article online at;DOI
The paper presents the Arithmetic and logic Unit (ALU) of a prototype programmablelogic Controller (PLC), implemented in an FPGA device. The PLC implements on the machine language level a subset of the instruction se...
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The paper presents the Arithmetic and logic Unit (ALU) of a prototype programmablelogic Controller (PLC), implemented in an FPGA device. The PLC implements on the machine language level a subset of the instruction set defined in the EN 61131-3 norm. The design was prepared as a set of synthesizable Verilog, and VHDL models. The ALU can execute 32 operations, which include the basic logic operations, comparators, and the four basic arithmetic operations. The operations can be performed for fixed-point, and floating-point numbers. All the operations are implemented fully in hardware, so the solution is fast. The HDL models used for synthesis can be easily ported to other FPGA architectures, or to an ASIC.
The software of programmable logic controllers (PLC) for Safety Instrumented Systems in the oil and gas industry is designed based on safety specifications that must be validated prior to deployment. This paper propos...
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The software of programmable logic controllers (PLC) for Safety Instrumented Systems in the oil and gas industry is designed based on safety specifications that must be validated prior to deployment. This paper proposes a method for the automatic test of the Cause and Effect Matrix specifications on PLC systems. For such testing, the specifications are represented as a set of Petri net models that observe the controlled system behavior. The use of a formal model allows to systematically compose and translate the Petri Nets into a program that commands the PLC inputs and observes when the PLC outputs fail the safety specifications. A prototype tool has been developed to automatically perform the test of the Cause and Effect Matrix on a given PLC. A furnace project has been used to ascertain that the proposed method is easy to use and viable.
Several new electronic functions are constantly being integrated into a silicon-on-chip (SoC) encapsulated in a less than 0.5 mm pitch array package, making the future bright for Embedded Board Test (EBT). The SoC wil...
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Several new electronic functions are constantly being integrated into a silicon-on-chip (SoC) encapsulated in a less than 0.5 mm pitch array package, making the future bright for Embedded Board Test (EBT). The SoC will become a main stream component in all consumer portable devices extending into IoT devices. Embedded Board Test (EBT) uses the IEEE defined in-chip access to verify that the IC is attached to the PCBA and in good working condition. It then extends the tests to surrounding components and potentially drives through to test ICs further away. The EBT testing concept suits HDI PCBA (printed circuit board assembly) designs in which one or more CPU or SoC functions as the brain. Successful adoption of EBT requires it to be crafted early in PCBA design to develop the test software as the PCBA design evolves and matures. Test coverage lost due to buried traces can be recovered using EBT, which makes it a complementary test to ICT. Pairing ICT and EBT is ideal as ICT can perform unpowered tests to locate and pinpoint short and open defects, as well as wrong components. A key ingredient in the success of EBT, similar to ICT and FT, is the test fixture and fixture automation.
Four partners - two SMEs and two research institutes - have united forces to elaborate principles and building blocks to be exploitable for the embedded condition monitoring system with advanced features. Existing nov...
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Four partners - two SMEs and two research institutes - have united forces to elaborate principles and building blocks to be exploitable for the embedded condition monitoring system with advanced features. Existing novel kind of probabilistic logic was selected for propagation and compounding of information within the hierarchical distributed system, taking pervasive uncertainty of available data into account. Efficient algorithms were developed for teal-time quantification of uncertainty of measured signals. Significant effort is devoted to meaningful transformation of the probabilistic outputs into clear notifications for operators and maintenance personnel. Variety of particular solutions take advantage of the specific expertise of the involved partners and allow consideration of various future applications. Currently, the system is in the stage of testing in a metal-processing plant.
In this paper we address the safety analysis of chemical plants controlled by programmable logic controllers (PLCs). We consider sequential function charts (SFCs) for the programming of the PLCs, extended with the spe...
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This paper is devoted and intended to solve the problems of determining the precise separation efficiency and accurate prediction for the solid yield of multi-product cyclones based on existing experimental data. The ...
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