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GUARANTEED RESPONSE-TIMES IN A DISTRIBUTED HARD-REAL-TIME ENVIRONMENT

IEEE TRANSACTIONS ON SOFTWARE ENGINEERING 1986年第12期12卷 1139-1144页

作者： LEINBAUGH, DW YAMINI, MR AT&T Bell Laboratories Columbus OH 43213

A distributed real-time programming model is presented that consists of a set of tasks whose segments require processor time and devices. It is operated on a dedicated network of microcomputers. A task is begun upon receipt of an external signal or the completion of other tasks. Segments communicate via message passing, and there may be a limited number of transient communication errors. A heuristic algorithm is formulated to determine an upper bound upon the response time of each task. Consequently, it is useful in a hard-real-time environment to find out if response times will always be met. This technique can result in great savings in development time and cost.

关键词： Time Factors Upper Bound Operating Systems Optimal Scheduling Performance Evaluation Delay Real Time Systems Response Time Analysis Distributed Operating System Guaranteed Response Time Hard Real Time Process Control programming model

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Applications on a multithreaded architecture: A case study with EARTH-MANNA

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PARALLEL COMPUTING 2002年第1期28卷 3-33页

作者： Sodan, AC GMD First Berlin Germany

Multithreading offers benefits with respect to the formulation of irregular dynamic programs and their dynamic scheduling, load balancing and interaction. Furthermore, low-cost communication on distributed-memory machines by remote-memory access is provided by some systems for efficient communication. EARTH is one of the few systems which combines both, while most other systems either focus on communication or provide multithreading in shared-memory environments. Dynamic irregular applications are often awkward to parallelize on distributed memory when using SPMD style programming via MPI and show different requirements for formulation. In addition, dynamic irregular applications also may show a fairly tight data coupling. Systems like EARTH are beneficial then, because they specifically support large number of small data exchanges by providing short startup times and the tolerance of even small latencies (offering very fine-grain threads). However, static regular applications with tight data coupling are supported too. On the example of EARTH, this paper investigates the benefits of low-cost communication and multithreading, parallelizing three AI applications with medium to high communication intensity. We present experimental results obtained on the MANNA machine. (C) 2002 Elsevier Science B.V. All rights reserved.

关键词： multithreading latency reduction latency hiding programming model irregular dynamic applications

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Consistency-Based Algorithms for Decision-Making With Interval Fuzzy Preference Relations

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IEEE TRANSACTIONS ON FUZZY SYSTEMS 2019年第10期27卷 2052-2066页

作者： Meng, Fan-Yong Tang, Jie Fujita, Hamido Cent S Univ Sch Business Changsha 410083 Hunan Peoples R China Nanjing Univ Informat Sci & Technol Sch Management & Econ Nanjing 210044 Jiangsu Peoples R China Cent S Univ Business Sch Changsha 410083 Hunan Peoples R China Iwate Prefectural Univ Takizawa 0200693 Japan

This paper reviews and analyzes several consistency concepts for interval fuzzy preference relations (IFPRs). On the basis of the comparisons, one can find that Krejs additive and multiplicative consistency concepts are more reasonable and flexible. Considering the issues that previous methods cannot fully address regarding incomplete and inconsistent IFPRs, this paper studies incomplete and inconsistent IFPRs using custom programming models based on Krejs concepts. Meanwhile, programming models for judging the additive and multiplicative consistency of IFPRs are constructed, respectively. Considering the consensus of IFPRs in group decision-making, a consensus index is defined, and programming models for improving the consensus levels of individual IFPRs are built. On the basis of the consistency and consensus analysis, two consistency-based algorithms for group decision-making with inconsistent and incomplete IFPRs are offered. One method is based on Krejs additive consistency concept, and the other uses Krejs multiplicative consistency concept. Meanwhile, associated examples are provided to show the application of the new methods.

关键词： Additives Decision making programming Biological system modeling Indexes Finite element analysis Additive and multiplicative consistency consensus decision-making IFPR programming model

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A comparative study for consistency-based decision making with interval multiplicative preference relations

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INTERNATIONAL JOURNAL OF GENERAL SYSTEMS 2020年第4期49卷 400-437页

作者： Meng, Fanyong Tang, Jie BeijingWuzi Univ Sch Informat Beijing Peoples R China Cent South Univ Sch Business Changsha Peoples R China

To ensure the reasonable application and perfect the theory of decision making with interval multiplicative preference relations (IMPRs), this paper continues to discuss decision making with IMPRs. After reviewing previous consistency concepts for IMPRs, we find that Krejci's consistency concept is more flexible and natural than others. However, it is insufficient to address IMPRs only using this concept. Considering this fact, this paper researches inconsistent and incomplete IMPRs that are usually encountered. First, programming models for addressing inconsistent and incomplete IMPRs are constructed. Then, this paper studies the consensus of individual IMPRs and defines a consensus index using the defined correlation coefficient. When the consensus requirement does not satisfy requirement, a programming model for improving consensus level is built, which can ensure the consistency. Subsequently, a procedure for group decision making with IMPRs is offered, and associated examples are provided to specifically show the application of main theoretical results.

关键词： Group decision making IMPR consistency and consensus programming model correlation coefficient

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Linked Data Processing for Human-in-the-Loop in Cyber-Physical Systems

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IEEE TRANSACTIONS ON COMPUTATIONAL SOCIAL SYSTEMS 2021年第5期8卷 1238-1248页

作者： Zheng, Zhigao Mumtaz, Shahid Khosravi, Mohammad R. Menon, Varun G. Huazhong Univ Sci & Technol Sch Comp Sci & Technol Wuhan 430074 Peoples R China Univ Santiago Inst Telecomunicacoes P-3810193 Aveiro Portugal Persian Gulf Univ Dept Comp Engn Bushehr *** Iran Shiraz Univ Technol Telecommun Grp Shiraz *** Iran SCMS Sch Engn & Technol Dept Comp Sci & Engn Ernakulam 683576 India

There are several kinds of smart devices, such as smartphones, sensors, and smart wearable devices, included in the Human-in-the-Loop (HITL) system, but different devices have their own data processing and programming paradigm. Programmers usually need to design the same data processing logic for different devices by using a different programming model. How to mapping the same code to different devices without any change is an emerging topic in the HITL system. Furthermore, the intelligent data processing for the smart CPS sector is experiencing significant growth in data volume, driven by a large number of smart devices that are anticipated in the near further. All these smart devices are expected to improve the overall HITL system performance marvelously. A large number of devices can also outstandingly increase the data volume, which needs to be processed in real time. How to process large-scale data on a smart device in real time is another challenge. Focused on these challenges, this article proposed a computing device-aware HITL CPS data processing framework, named Barge, aiming to map the regular code to the different hardware without any change. In Barge, a semantic model, an architecture-driven programming model, and a graph partition scheme are included. The semantic model is used to express the user-defined graph algorithms by using the domain-specific language. The architecture-driven programming model will execute the graph algorithms on a different device in parallel. Furthermore, the graph partition scheme will partition the large-scale graphs into suitable partitions by aware of the topology to make the partitioned data suitable for kinds of smart devices. We believe that our work would open a wide range of opportunities to improve the performance of large-scale graph processing for HITL systems.

关键词： Data models Data processing programming Graphics processing units Computer architecture Computational modeling Smart devices Cyber-physical systems (CPSs) data partition graph computing Human-in-the-Loop (HITL) new architecture programming model semantic model

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STEPS TOWARD ARCHITECTURE-INDEPENDENT IMAGE-PROCESSING

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COMPUTER 1992年第2期25卷 21-31页

作者： WEBB, JA Sch. of Comput. Sci. Carnegia Mellon Univ. Pittsburgh PA

Adapt, an architecture-independent language based on the split-and-merge model, is presented. It is specialized for efficient, parallel computation of image-processing algorithms. The split-and-merge programming model... 详细信息

关键词： Adapt language architecture-independent image processing architecture-independent language computerised picture processing image-processing algorithms merging parallel computation parallel languages parallel programming programming model split-and-merge model

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The requirements of a high performance implementation of PVM

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FUTURE GENERATION COMPUTER SYSTEMS 1996年第1期12卷 3-11页

作者： Bernaschi, M IBM European Center for Scientific and Engineering Computing. P.le Giulio Pastore 6 00144 Roma Italy

PVM (Parallel Virtual Machine) is currently a defacto standard in the world of distributed computing based on message passing [10]. PVMe is a proprietary realization of the PVM programming model which maintains the full compliance with the original programming interface, but it is specially tuned to obtain higher performances on the SP2, the IBM parallel system based on the POWER 2 architecture and the AIX operating system. During the design and the development of PVMe we had a unique chance to gain clear indications about the aspects of the run-time system support more critical to achieve good results running applications by means of PVM. Hereafter we report about our experience and the (hopefully) useful lesson we learnt.

关键词： programming model communication protocols system overhead memory management techniques

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Concurrent Collections

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SCIENTIFIC programming 2010年第3-4期18卷 203-217页

作者： Budimlic, Zoran Burke, Michael Cave, Vincent Knobe, Kathleen Lowney, Geoff Newton, Ryan Palsberg, Jens Peixotto, David Sarkar, Vivek Schlimbach, Frank Tasirlar, Sagnak Rice Univ Houston TX 77251 USA Intel Corp Santa Clara CA 95051 USA Univ Calif Los Angeles Los Angeles CA 90024 USA

We introduce the Concurrent Collections (CnC) programming model. CnC supports flexible combinations of task and data parallelism while retaining determinism. CnC is implicitly parallel, with the user providing high-level operations along with semantic ordering constraints that together form a CnC graph. We formally describe the execution semantics of CnC and prove that the model guarantees deterministic computation. We evaluate the performance of CnC implementations on several applications and show that CnC offers performance and scalability equivalent to or better than that offered by lower-level parallel programming models.

关键词： Concurrent Collections (CnC) programming model parallel programming

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ISP Agent: A Generalized In-storage-processingWorkload Offloading Framework by Providing Multiple Optimization Opportunities

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ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION 2024年第1期21卷 1-24页

作者： Kang, Seokwon Kim, Jongbin Lee, Gyeongyong Lee, Jeongmyung Seo, Jiwon Jung, Hyungsoo Song, Yong Ho Park, Yongjun Hanyang Univ Seoul South Korea Samsung Elect Suwon South Korea Yonsei Univ Seoul South Korea Hanyang Univ 220 Wangsimni Ro Seoul South Korea Samsung Elect 416 Maetan 3 Dong Suwon Gyeonggi Do South Korea Yonsei Univ 50 Yonsei Ro Seoul South Korea

As solid-state drives (SSDs) with sufficient computing power have recently become the dominant devices in modern computer systems, in-storage processing (ISP), which processes data within the storage without transferring it to the host memory, is being utilized in various emerging applications. The main challenge of ISP is to deliver storage data to the offloaded workload. This is difficult because of the information gap between the host and storage, the data consistency problem between the host and offloaded workloads, and SSD-specific hardware limitations. Moreover, because the offloaded workloads use internal SSD resources, host I/O performance might be degraded due to resource conflicts. Although several ISP frameworks have been proposed, existing ISP approaches that do not deeply consider the internal SSD behavior are often insufficient to support efficient ISP workload offloading with high programmability. In this article, we propose an ISP agent, a lightweight ISP workload offloading framework for SSD devices. The ISP agent provides I/O and memory interfaces that allow users to run existing function codes on SSDs without major code modifications, and separates the resources for the offloaded workloads from the existing SSD firmware to minimize interference with host I/O processing. The ISP agent also provides further optimization opportunities for the offloaded workload by considering SSD architectures. We have implemented the ISP agent on the OpenSSD Cosmos+ board and evaluated its performance using synthetic benchmarks and a real-world ISP-assisted database checkpointing application. The experimental results demonstrate that the ISP agent enhances host application performance while increasing ISP programmability, and that the optimization opportunities provided by the ISP agent can significantly improve ISP-side performance without compromising host I/O processing.

关键词： In-storage processing solid state drive firmware programming model

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Towards Energy-Efficient Heterogeneous Multicore Architectures for Edge Computing

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IEEE ACCESS 2019年 7卷 49474-49491页

作者： Gamatie, Abdoulaye Devic, Guillaume Sassatelli, Gilles Bernabovi, Stefano Naudin, Philippe Chapman, Michael Univ Montpellier LIRMM CNRS F-34095 Montpellier France Cortus SA Co F-34130 Mauguio France

In recent years, the edge computing paradigm has been attracting much attention in the Internet-of-Things domain. It aims to push the frontier of computing applications, data, and services away from the usually centralized cloud servers to the boundary of the network. The benefits of this paradigm shift include better reactivity and reliability, reduced data transfer costs toward the centralized cloud servers, and enhanced confidentiality. The design of energy-efficient edge compute nodes requires, among others, low power cores such as microprocessors. Heterogeneous architectures are key solutions to address the crucial energy-efficiency demand in modern systems. They combine various processors providing attractive power and performance trade-offs. Unfortunately, no standard heterogeneous microcontroller-based architecture exists for edge computing. This paper deals with the aforementioned issue by exploring typical low power architectures for edge computing. Various heterogeneous multicore designs are developed and prototyped on FPGA for unbiased evaluation. These designs rely on cost-effective and inherently ultra-low power cores commercialized by Cortus SA, a world-leading semiconductor IP company in the embedded ultra-low power microcontroller domain. Some microarchitecture-level design considerations, e.g.,floating point and out-of-order computing capabilities, are taken into account for exploring candidate solutions. In addition, a tailored and flexible multi-task programming model is defined for the proposed architecture paradigm. We analyze the behavior of various application programs on available core configurations. This provides valuable insights on the best architecture setups that match program characteristics, so as to enable increased energy-efficiency. Our experiments on multi-benchmark programs show that on average 22% energy gain can be achieved (up to 45%) compared to a reference system design, i.e., a system with the same execution architecture,

关键词： Edge computing energy-efficiency heterogeneous multicore architectures programming model embedded systems

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