This paper focuses on the fractional-order modeling and analysis of single-phase quasi-Z-source rectifier (qZSR), aims to extend the single-phase qZSR from integer-order domain to fractional-order domain. Additionally...
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This paper focuses on the fractional-order modeling and analysis of single-phase quasi-Z-source rectifier (qZSR), aims to extend the single-phase qZSR from integer-order domain to fractional-order domain. Additionally, it has been demonstrated explicitly the mechanism by which fractional-order inductors (FOIs) and fractional-order capacitors (FOCs) affect the operating features of fractional-order quasi-Z-source rectifier (FO-qZSR). The fractional-order circuit model is built based on oustaloup's approximation method, the operational principle and control strategy of FO-qZSR, the expression of input current, inductor current, capacitor voltage and output voltage are also derived and analyzed in detail. Then, the above theoretical analysis is verified by simulation results by using the fotf toolbox in Matlab/Simulink, and the FO-qZSR presents more flexible and diverse operating features than integer-order qZSR. Finally, the hardware prototype is established with the help of the RT-LAB platform and the experimental results are consistent with the theoretical analysis and simulation results.
The typical strategy for the phase-shifted full-bridge (PSFB) converter is to design a linear compensator based on a small-signal model. However, this approach cannot provide a strongly robust output under changing op...
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The typical strategy for the phase-shifted full-bridge (PSFB) converter is to design a linear compensator based on a small-signal model. However, this approach cannot provide a strongly robust output under changing operating conditions or with perturbations in the converter parameters. In this article, a fixed-frequency pulse width modulation (PWM) based full-order sliding mode controller is proposed to improve the performance of a PSFB converter with diodes in series on the lagging leg. Firstly, to facilitate the application of sliding control laws, we construct a simplified equivalent control model by analyzing the phase-shifted modulation and operating waveforms of the converter. Secondly, we derive strict existence conditions for the sliding phases to ensure that the state trajectories fulfill the requirements. Thirdly, the perturbations of both the external and internal variables are considered in the equivalent control function to improve the stability of the controller. Finally, simulation and experimental results verify that the proposed sliding mode controller provides better dynamic regulation performance and robustness than does a linear controller.
In the last decades, aiming to control some processes and improve high-power system efficiency, multilevel converters have been commonly applied in adjustable-speed and high-performance drives in the mining and petroc...
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In the last decades, aiming to control some processes and improve high-power system efficiency, multilevel converters have been commonly applied in adjustable-speed and high-performance drives in the mining and petrochemical industries. Although they present operational advantages over the classic two-level topology in high-power and medium-voltage applications, the implementation of their current control still has some issues that deserve additional studies. In this line, this work presents a comparative study of two current control techniques for a five-level neutral point clamped (NPC) inverter for induction motor drives: 1) linear current control with space vector pulse width modulation (SV-PWM) command (normally applied in commercial drives) and 2) nonlinear digital hysteresis current control. A multiband (MB) switching frequency limiter is presented in this article for the last technique. The multilevel power electronic converter investigated here is an NPC converter known as a type-G converter. Some challenges for the implementation of digital MB hysteresis are discussed. In this article, a digital signal processor (DSP) is selected for both strategies, while a field-programmable gate array (FPGA) is employed to implement the frequency-limiting circuits and switching logic of the digital hysteresis control. In both cases, the drive operates under the indirect implementation of rotor field-oriented control (RFOC). Simulation results obtained from PLECS and experimental results in a 2-hp laboratory prototype are presented and discussed.
Power devices and DC-link capacitors are considered reliability-critical components in power converters. Thermal stress caused by power loss leads to wear-out failures of DC-link capacitors and power devices. Previous...
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In this paper, a study was made of the control method for a resonant inverter with a multifunctional integral electromagnetic component (MIEC), which acts as an oscillatory circuit and at the same time a stabilizer. T...
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Abstract: The operation of a three-phase inverter with output network chokes (a network regulator) in the reactive power compensation mode is considered. The main attention is paid to the comparison of two fundamental...
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Servomotor-controlled valves are widely used in industry for pressure control of pneumatic systems. However, as a first stage, they can cause significant hysteresis that can result in loss of pressure or flow control ...
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Servomotor-controlled valves are widely used in industry for pressure control of pneumatic systems. However, as a first stage, they can cause significant hysteresis that can result in loss of pressure or flow control accuracy at the second stage level. To reduce this effect and improve accuracy, a possible solution relies on the use of on-off switching valves controlled by pulse width modulation (PWM). This approach is studied, firstly by analytically determining how the PWM parameters have to be tuned according to the on-off valve characteristics, secondly by ensuring that these characteristics provide the desired behavior of the system, and finally by experimentally verifying whether the PWM control can successfully reduce hysteresis, without decreasing the application range.
In this paper, a novel method named as level vector pulse width modulation (LVPWM) is proposed for multilevel inverters. Similar to the conventional space vector pulse width modulation (SVPWM), the proposed method is ...
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In this paper, a novel method named as level vector pulse width modulation (LVPWM) is proposed for multilevel inverters. Similar to the conventional space vector pulse width modulation (SVPWM), the proposed method is a vector-based method in the & alpha;-& beta;frame. Unlike the SVPWM, the variables of each of the & alpha;and & beta;axes are considered separately. Instead of space vectors, level vectors are considered for the synthesis of the reference vectors. There is no need to consider multiple switching states, vectors, and large lookup tables in the algorithm. The appropriate switching states for the synthesis of the reference vectors are determined using simple computations at each sampling time. Generality for different inverter topologies, online implementation, simplicity of the algorithm and computations, independency of the algorithm complexity from the number of switching states, and easy extension to overmodulation region are the advantages of the proposed method. Implementation of the LVPWM in different inverter topologies is studied. The validation of the proposed modulation strategy is carried out by simulation and experimental results.
In this article, an active rectifier with pulse width modulation (PWM) mode on- and off-delay compensation technique is proposed. Conventional delay compensation modes: current mode, voltage mode, and delay-based mode...
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In this article, an active rectifier with pulse width modulation (PWM) mode on- and off-delay compensation technique is proposed. Conventional delay compensation modes: current mode, voltage mode, and delay-based mode are discussed respectively. Also, the adaptive delay compensation technique and potential disturbance problems are analyzed. To achieve wide and flexible delay compensation range, the proposed rectifier adopts current mode delay compensation methods to eliminate on- and off-delay. Moreover, PWM mode feedback loops are built to compensate circuit delays adaptively under various process, voltage, and temperature (PVT) and loading conditions. Compared with previous works, the proposed PWM mode technique converts the fluctuant error voltages into the fixed duty cycle signal in each cycle, avoiding the disturbance on compensation current and even error flips of comparators. The stability of the current compensation is improved. The proposed active rectifier was designed and fabricated in $0.18\mu \text{m}$ CMOS process. Both TX and RX coils are designed and fabricated on printed circuit board (PCB), and the diameter is limited below 3cm. Measurement results show that, with the input sine voltage amplitude ranging from 1.5V to 2.4V and 2MHz operating frequency, the peak power conversion efficiency (PCE) achieves 91.7% under $200\Omega $ loading resistor and the peak voltage conversion ratio (VCR) achieves 93.7% with $500\Omega $ loading resistor. The maximum output power reaches 57.6 mW. Compared with the case with no PWM mode delay compensation, the measurement PCE and VCR are improved by at least 9%. The proposed rectifier achieves better dynamic performance and is suitable for wireless power transfer (WPT).
Rather than the conventional pure consensus, this article proposes a pulsewidthmodulation (PWM) protocol for an improved interval consensus of multiagent systems from the distributed perspective. In particular, the c...
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Rather than the conventional pure consensus, this article proposes a pulsewidthmodulation (PWM) protocol for an improved interval consensus of multiagent systems from the distributed perspective. In particular, the consensus of all the agents is achieved within a prescribed interval, which is merely available to partial agents, though. The PWM protocol effectively relieves the running burden of the agents without the additional analogue-to-digital conversion. The modulation periods of different agents are allowed to be heterogeneous. By nominating the agents that have access to the given interval as leaders and others as followers, the proposed distributed PWM protocol introduces a projection operator for the leaders in order for the collective aggregation. In terms of the graph connectivity condition of containing a spanning tree, it is shown that the concerned interval consensus objective is realized by the proposed distributed PWM protocol. Simulations are eventually performed to validate the established theoretical results.
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