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Dual three-phase induction motor drive with digital current control in the stationary reference frame

IEE PROCEEDINGS-ELECTRIC POWER APPLICATIONS 2006年第1期153卷 129-139页

作者： Bojoi, R Levi, E Farina, F Tenconi, A Profumo, F Politecn Torino Dipartimento Ingn Elettr I-10129 Turin Italy Liverpool John Moores Univ Sch Engn Liverpool L3 3AF Merseyside England

Vector control of a dual three-phase induction machine, with two sets of three-phase stator windings spatially shifted by 30 electrical degrees, is elaborated in the paper. The stator windings are fed from a current-controlled PWM six-phase IGBT voltage source inverter (VSI). The main problem in realisation of such a drive is an adequate current control algorithm, which has to cope with the inherent asymmetries of the drive. Furthermore, the digital implementation has to ensure zero steady state current error for the whole frequency range of the drive. After reviewing the existing Solutions, the paper proposes a current control scheme that is based on four digital current controllers in the stationary reference frame. A design procedure for the current controllers is presented and current controllers are implemented in a laboratory test rig, in conjunction with a previously developed PWM scheme that provides operation with low values of low-order output voltage harmonics. Experimental tests are conducted and the results are given for a direct rotor field oriented control (DRFOC) of a 10 kW dual three-phase induction motor drive prototype. The results confirm the validity of the control scheme.

关键词： INDUCTION motors pulse-width modulation ELECTRIC potential HARMONICS (Electric waves) SEMICONDUCTORS ELECTRIC inverters

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Novel sensorless driving method of SRM with external rotor using impressed voltage pulse

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IEE PROCEEDINGS-ELECTRIC POWER APPLICATIONS 2006年第5期153卷 632-641页

作者： Yu, C. -H. Chen, T. -C. Natl Cheng Kung Univ Dept Engn Sci Tainan 70101 Taiwan

The paper presents an improved impressed diagnostic pulse-voltage method to estimate the rotor position of a switched-reluctance motor (SRM) with an external rotor. The fundamental method of impressed diagnostic pulse voltage is to impress pulse voltage at the inactive phases of a SRM that has an external rotor. Because the variations of inductance are dependent on the rotor position, and because the characteristic current values produced from the pulse voltage are dependent on the inductance, the rotor position can be inferred by observing the characteristic-current value. If the inductance of the SRM does not vary obviously, noise in the characteristic-current signal may cause failure of the sensorless-position-estimation method. Therefore, an improved impressed diagnostic pulse-voltage method is presented to increase the variations of characteristic current and estimate rotor position. First, the structure, characteristics, operational principles and mathematical model of the SRM with an external rotor are introduced. Then the improved impressed diagnostic pulse-voltage method is utilised to implement the sensorless position estimation for commutation control.

关键词： RELUCTANCE motors ELECTRIC machinery -- Rotors SYNCHRONOUS electric motors ELECTRONIC pulse techniques pulse-width modulation DIGITAL electronics ELECTRONIC control ELECTRODYNAMICS

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Discrete-time internal model controller for three-phase PWM inverters with insulator transformer

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IEE PROCEEDINGS-ELECTRIC POWER APPLICATIONS 2006年第1期153卷 57-67页

作者： Botterón, F Pinheiro, H Univ Fed Santa Maria CT NUPEDEE GEPOCPower Elect & Control Res Grp BR-97105900 Santa Maria RS Brazil

A new digital voltage controller is proposed, derived in agreement with the internal model principle for three-phase inverters with Delta Y transformer at the Output. A dynamic model of the inverter, transformer, filter and load in stationary alpha-beta co-ordinates is derived and a decoupling method is proposed. The proposed digital controller is not prone to amplify DC components, which can lead to output transformer saturation. Additionally, this digital controller results in a simple form and is well Suited for fixed-point implementation. Experimental results. implemented in a 16-bit DSP controller, validate the theoretical developments and demonstrate the good steady-state performance of the proposed controller under both nonlinear balanced and unbalanced loads.

关键词： ELECTRIC potential pulse-width modulation ELECTRIC inverters ELECTRIC transformers DIGITAL electric filters DECOUPLING (Mathematics)

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Design and performance of ZCS-ZVS combined snubber network in a DC-DC application

Design and performance of ZCS-ZVS combined snubber network i...

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IASTED International Conference on Power, Energy, and Applications

作者： Mashod, Mohd Hasanul Arifin Yahaya, Nor Zaihar Univ Teknol Petronas Sch Elect & Elect Engn Tronoh 31750 Perak Darul Rid Malaysia

ISBN: (纸本)9780889866140

In this paper, a combined zero-current switching and zero-voltage switching (ZCS-ZVS) snubber network is proposed for a DC-DC boost converter. This technique can reduce the ringing and spiking on drain-source voltage (VDs) during switching. Thus, it will reduce the EMI radiation and the voltage and current stress encountered by switches. A boost converter with 60 V input voltage, 80 V output voltage and 100 kHz switching frequency adopting this technique is presented as an example, to illustrate the circuit operation principles and derive the design procedures. Simulation and hardware implementation of a combined snubber boost converter has been made to validate the operation and the efficiency. Experimental result shows an improvement in output power efficiency of 94%. This is an increment of 20% compared to the conventional boost converter.

关键词： pulse-width modulation soft switching snubber network and DC-DC converter

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pulse-width modulated Z-source neutral-point-clamped inverter

Pulse-width modulated Z-source neutral-point-clamped inverte...

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21st Annual IEEE Applied Power Electronics Conference (APEC 2006)

作者： Loh, PC Blaabjerg, F Feng, SY Soon, KN Nanyang Technol Univ Sch Elect & Elect Engn Singapore Singapore

ISBN: (纸本)0780395476

This paper presents the careful integration of a newly proposed Z-source topological concept to the basic neutral-point-clamped (NPC) inverter topology, for designing a three-level inverter with both voltage-buck and -boost capabilities. The designed Z-source NPC inverter uses two unique X-shaped LC impedance networks connected between two isolated dc input power sources and its inverter circuitry for boosting its ac output voltage. Through the design of an appropriate pulse-width modulation (PWM) algorithm, the two impedance networks can be short-circuited sequentially (without shooting through the inverter full dc link) for implementing the "Nearest Three Vectors" (NTV) modulation principle with minimized harmonic distortion and device commutations per half carrier cycle, while performing voltage-boosting. With only a slight modification to the inverter PWM algorithm and by short-circuiting the two LC impedance networks simultaneously, the designed NPC inverter, with no requirement for dead-time delay, can also be operated with completely eliminated common-mode voltage. Implementation-wise, detailed vectorial analysis interestingly shows that the same generic set of carrier-based modulation expressions can be used for controlling Z-source two-level inverter and NPC inverter with and without Reduced Common-Mode (RCM) switching. All findings presented in the paper have been confirmed in simulation and experimentally using an implemented laboratory prototype.

关键词： neutral-point-clamped inverters Z-source inverters buck-boost pulse-width modulation common-mode voltage

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A low-cost gate driver design using bootstrap capacitors for multilevel MOSFET inverters

A low-cost gate driver design using bootstrap capacitors for...

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CES/IEEE 5th International Power Electronics and Motion Control Conference

作者： Graczkowski, J. J. Neff, K. L. Kou, X. Univ Wisconsin Dept Elect Engn Platteville WI 53818 USA

ISBN: (纸本)1424404487

Multilevel inverters require a large number of power semiconductors. The gate driver for each power semiconductor requires its own floating or isolated do voltage source. Traditional methods on meeting the requirement are expensive and bulky. This paper presents a gate driver design for floating voltage source type multilevel inverters. Bootstrap capacitors are used to form the floating voltage sources in the design, which allows a single DC power supply to be used by all the gate drivers. Specially configured diode plus the proper charging cycles maintain adequate capacitor voltage levels. Such a simple and low cost solution allows user to utilize the easy accessible single-channel gate drivers for multilevel inverter applications without the extra cost on the bulky isolated do power supplies for each gate driver. A prototype 3-cell 8-level floating voltage source inverter using the method illustrates the technique.

关键词： multilevel inverter bootstrap capacitor pulse-width modulation gate driver MOSFET inverter capacitor voltage balancing floating voltage source inverter flying capacitor inverter

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Selective harmonic controlling for three-level high power active front end converter with low switching frequency

Selective harmonic controlling for three-level high power ac...

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CES/IEEE 5th International Power Electronics and Motion Control Conference

作者： Zhang, Hui Liu, Kaipei Braun, M. Chan, C. C. Wuhan Univ Sch Elect Engn Wuhan 430072 Peoples R China Univ Karlsruhe Inst Power Elect & Elect Dri Karlsruhe Germany

ISBN: (纸本)1424404487

Controlling of a specific harmonic by a switching converter with switching frequency lower than 1 kHz was originally implemented by two-level Optimal pulse pattern with Unsymmetrical Switching angles [10], namely by OPUS-technique. That means, given a desired fundamental and one or more specific harmonics, the problem is to find the switching times (angles) that produce the fundamental while generating specifically all chosen harmonics. Based on the OPUS-technique a three-level optimal pulse pattern is proposed for high power level applications with low switching frequency. The transcendental mathematical equations are developed. Using the prior results of all complete solutions of selective harmonic elimination (SHE) the solutions of the new equations can be found by Newton iteration method. In particularly, the modulation performance of OPUS-technique for three-level Optimal pulse pattern with Unsymmetrical Switching angles is demonstrated by the trajectory of the converter voltage space vector integral. Finally, the control range of a specific harmonic is given by OPUS-technique.

关键词： partly unsymmetrical optimal pulse pattern pulse-width modulation voltage source inverter harmonics control range

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A new PWM strategy to reduce the common-mode voltage

A new PWM strategy to reduce the common-mode voltage

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IEEE Region 10 Conference (TENCON 2006)

作者： Lu Haifeng Cheng Xiaomeng Qu Wenlong Zhang Xing Fan Yang Tsinghua Univ Dept Elect Engn Div Power Elect State Key Lab Power Syst Beijing 100084 Peoples R China

ISBN: (纸本)9781424405480

High rate of variation of common-mode voltage (CMV) brings problems to the pulse width modulation (PWM) inverter motor drive system. In this paper, a new two-stage CMV reduction PVVM strategy is proposed. In the high voltage region, the peak-to-peak value of the CMV is reduced to one third of the DC voltage, even despite of the dead-time effect. And in the low voltage region, both the CMV and the current ripple are reduced. In the entire voltage range, the linear modulation region is not limited and the switching loss is reduced because of fewer switching actions. Experimental results are presented to fully support the above-mentioned claims.

关键词： common-mode voltage pulse-width modulation dead-time effect linear modulation region current ripple

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Hardware implementation of the high frequency link inveter using the dSPACE DS1104 digital signal processing board

Hardware implementation of the high frequency link inveter u...

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1st International Power and Energy Conference (PECon 2006)

作者： Salam, Zainal Soon, Toh Leong Ramli, Mohd. Zulkifli Univ Teknol Malaysia Fac Elect Engn Johor Baharu 81310 Malaysia

ISBN: (纸本)9781424402731

In this paper, a detail description of a highly efficient and compact high frequency link inverter is given. The focus will be on the Deadbeat controller implementation using the dSPACE DS1104 Digital Signal Processing (DSP) board. In addition, other hardware components such as the gate drives, power circuit, control signals generation, signal conditioning and test-load banks is also described. Selected results from the experimental prototype will be presented.

关键词： high frequency inverter high frequency transformer pulse-width modulation

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System design of implantable micro-stimulator for medical treatments

System design of implantable micro-stimulator for medical tr...

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IEEE Asia Pacific Conference on Circuits and Systems

作者： Chang, Shou-Jung Chung, Wen-Yaw Chuang, Chiung-Cheng Chung Yuan Christian Univ Dept Elect Engn Tao Yuan 32023 Taiwan Chung Yuan Christian Univ Dept Biomed Engn Tao Yuan 32023 Taiwan

ISBN: (纸本)9781424403868

We propose an implantable micro-stimulator parameter controller circuit to modulate stimulation parameter, such as frequency and pulse width. We used pulse-width modulation (PWM) technology to control parameter that differed from the traditional microprocessor-embedded micro-stimulator architecture. In general, the stimulation parameter of microstimulator ought to include pulse width, amplitude and frequency, as well as interphase interval. Moreover, the stimulation waveform should be biphasic pulses. In our system, the pulse width was 0-1ms, amplitude, 0-11.3mA at R-L=1k Omega;and the maximum stimulus frequency was 1053 Hz. The designed system will be fabricated in Vanguard International Semiconductor Corporation (VIS) 0.35um 2P4M 3.3/13.5V CMOS process.

关键词： microstimulator pulse-width modulation

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