For different rasterized scenes, even different areas of the same scene, the performance bottleneck of rasterization may be different, and current graphics processors cannot choose the appropriate rasterization algori...
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ISBN:
(纸本)9789881476890
For different rasterized scenes, even different areas of the same scene, the performance bottleneck of rasterization may be different, and current graphics processors cannot choose the appropriate rasterization algorithm according to the specific rendering scene. Therefore, a reconfigurable graphics processor that supports switching of algorithms to achieve the best performance is a promising choice. The existing graphics processor suffers the constraints of calculation, memory and power consumption in different rasterization application scenarios. Therefore, it is very important to determine how to schedule different rasterization algorithms with different performance according to the actual requirements in the reconfigurable graphics hardware. This paper evaluates and analyzes the performance characteristics of three main-stream rasterization algorithms (scan-line filling algorithm, edge filling algorithm, and flood filling algorithm) in different application scenarios. Pearson correlation coefficient (PCC) analysis is leveraged to analyze the relationship between performance/energy and evaluation metrics. Based on these performance characterization data, this paper puts forward some reconstruction suggestions for the reconfigurable graphics processor. We hope to contribute to reconfigurable graphics processing.
In this work, we describe a new algorithm for rendering polygons defined by cubic Bezier curve segments in current GPUs. Unlike other approaches, our algorithm has a simple preprocessing that does not require computin...
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In this work, we describe a new algorithm for rendering polygons defined by cubic Bezier curve segments in current GPUs. Unlike other approaches, our algorithm has a simple preprocessing that does not require computing tessellations, and can be implemented in GPU as a geometry shader. The polygon is decomposed into a set of simplices which are individually rasterized into the stencil buffer to recreate the shape that is finally rendered in the frame buffer. Each simplex is rasterized using a fragment shader that evaluates the implicit equation of the Bezier curve to discard the pixels that fall outside it. The proposed method is simple, fast, robust and general, as it can handle curved polygons with holes, several components or self-intersections. (C) 2008 Elsevier Ltd. All rights reserved.
Tato práce se zabývá rozborem grafického retezce, pomocí kterého lze vykreslit požadovaný obraz. Dokument je zamerený na vykreslovací algoritmy, které jsou využív...
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Tato práce se zabývá rozborem grafického retezce, pomocí kterého lze vykreslit požadovaný obraz. Dokument je zamerený na vykreslovací algoritmy, které jsou využívány v rasterizacním bloku. Hlavním cílem této práce je popsat vybrané vykreslovací algoritmy, které jsou vhodné pro implementaci v hardware. Cílovým hardware, na kterém by mely být vykreslovací algoritmy implementovány a testovány, jsou programovatelná hradlová pole FPGA. Jako možná cílová platforma byla zvolena platforma FITkit.
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