The reliability is a vital aspect in the design of Network-on-Chip (NoC) based systems because a fault in communication medium may cause an overall system failure. On the other hand, performance degradation is an ines...
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ISBN:
(纸本)9781467361354
The reliability is a vital aspect in the design of Network-on-Chip (NoC) based systems because a fault in communication medium may cause an overall system failure. On the other hand, performance degradation is an inescapable consequence of fault-tolerant architectures. In this paper, we propose a fault-tolerant NoC architecture that attains higher performance by using low cost agents in a hierarchical manner. These agents which are distributed all over the network, collect, process, and distribute different fault information. Moreover, we propose an enhanced fault-tolerant and congestion-aware routing method that exploits the classified fault information related to the permanent faults that might occur inside the links, network interfaces and different parts of the routers. The experimental results reveal that the proposed NoC architecture imposes small area and power overheads.
Opportunistic networks usually work in the environment where sparse nodes and dense nodes coexist. How to make the routing algorithm efficiently run under these complex scenes is an open issue. In this paper, a spray ...
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In this paper, we study the routing selection in partial deployment of SAVA nodes in the trustworthy Internet. We propose and compare three routing algorithms, i.e., Shortest-Path Algorithm (SPA), SAVA based Shortest-...
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ISBN:
(纸本)9781427629807
In this paper, we study the routing selection in partial deployment of SAVA nodes in the trustworthy Internet. We propose and compare three routing algorithms, i.e., Shortest-Path Algorithm (SPA), SAVA based Shortest-Path Algorithm (SSPA), and SAVA based Shortest-Path Algorithm with Load Balancing (SSPALB). Beside analytical results, we run simulations which met our expectations.
The increasing viability of 3-D silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extension of 2-D mesh-based tiled chip-multiprocessor architecture...
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The increasing viability of 3-D silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extension of 2-D mesh-based tiled chip-multiprocessor architectures into three dimensions. This paper focuses on efficient routing algorithms for such 3-D mesh networks. Existing routing algorithms suffer from either poor worst-case throughput (DOR, ROMM) or poor latency (VAL). Although the minimal routing algorithm O1TURN proposed in already achieves near-optimal worst-case throughput for 2-D mesh networks, the optimality result does not extend to higher dimensions. For 3-D and higher dimensional meshes, the worst-case throughput of O1TURN degrades tremendously. The main contribution of this paper is a new oblivious routing algorithm for 3-D mesh networks called randomized partially-minimal (RPM) routing. RPM provably achieves optimal worst-case throughput for 3-D meshes when the network radix is even and within a factor of 1/k(2) of optimal worst-case throughput when is odd. Finally, whereas VAL achieves optimal worst-case throughput at a penalty factor of 2 in average latency over DOR, RPM achieves (near) optimal worst-case throughput with a much smaller factor of 1.33. For practical asymmetric 3-D mesh configurations where the number of device layers are fewer than the number of tiles along the edge of a layer, the average latency of RPM reduces to just a factor of 1.11 to 1.19 of DOR. Additionally, a variant of RPM called randomized minimal first (RMF) routing is proposed, which leverages the inherent load-balancing properties of the network traffic to further reduce packet latency without compromising throughput.
The network topologies enhancements are necessary in correspond to the growing of data networks. In this paper, large network problem is described. It includes the routing update cost. The concept of hierarchical netw...
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ISBN:
(纸本)9781479900312
The network topologies enhancements are necessary in correspond to the growing of data networks. In this paper, large network problem is described. It includes the routing update cost. The concept of hierarchical network is explained as a considered solution. The hierarchical routing algorithms working methodology and protocols are presented and compared. In addition, it provides a sufficient description for the pros and cons of each protocol. The hierarchical network problems of cluster number, size distribution and number of levels, and solving approaches are discussed. This paper discusses how to identify the best clustering algorithm for wired, ad-hoc and wireless sensor networks. The optimization guidelines are explained.
routing in Darknets, membership concealing over-lays for pseudonymous communication, like for instance Freenet, is insufficiently analyzed, barely understood, and highly inefficient. These systems at higher performanc...
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ISBN:
(纸本)9781467359443
routing in Darknets, membership concealing over-lays for pseudonymous communication, like for instance Freenet, is insufficiently analyzed, barely understood, and highly inefficient. These systems at higher performance are promising privacy preserving solutions for social applications. This paper contributes a realistic analytical model and a novel routing algorithm with provable polylog expected routing length. Using the model, we additionally prove that this can not be achieved by Freenet's routing. Simulations support that our proposed algorithm achieves a better performance than Freenet for realistic network sizes.
The De Bruijn topology, due to its interesting features such as a small minimal path, a small average latency and a small average number of hops, is a promising alternative topology to mesh-based NoCs for low-power ap...
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ISBN:
(纸本)9781467361057
The De Bruijn topology, due to its interesting features such as a small minimal path, a small average latency and a small average number of hops, is a promising alternative topology to mesh-based NoCs for low-power applications. However, these advantages strongly depend on the efficiency of the routing algorithm in presence of congestion. This paper investigates efficient implementations of routing algorithms in NoCs based on the De Bruijn topology. Four routing algorithms are proposed and evaluated for NoCs up to 64 nodes. Simulation results show that combining FIFO buffers and Deviation Priority in the General Shifting based routing Algorithm "GSRA" leads to the best performances. With the proposed routing algorithm, the De Bruijn-based NoCs up to 64 nodes are shown to keep excellent communication bandwidth and latency with packet injection rates above 10%. The average number of hops is significantly smaller than for corresponding mesh-based NoC, thereby making the De Bruijn topology an excellent candidate for low-power applications.
Topological structure is an important part of the design of network on chip systems. The majority of current NoC architectures employ mesh topology, but at some practical application, NoC systems often integrate a num...
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ISBN:
(纸本)9781467349345
Topological structure is an important part of the design of network on chip systems. The majority of current NoC architectures employ mesh topology, but at some practical application, NoC systems often integrate a number of heterogeneous blocks, or some fabrication faults, reliability issues, may lead to the need of irregular topologies. Consequently, simplistic routing techniques such as XY scheme can not be employed in irregular topologies. This paper presents an efficient specific routing scheme for the irregular mesh network which can be guaranteed for the connection in irregular topologies. This paper applies routing tables (RT) to realize the algorithm and use OVP (Open Virtual Platforms)+ TLM (Transaction Level Modeling)+systemC to create a virtual platform, achieving a 16 xl6 irregular mesh topology of heterogeneous systems. Finally the routing scheme is applied to test specific real application network instances, and the result shows its connectivity and efficiency.
Congestion occurs frequently in Networks-on-Chip when the packets demands exceed the capacity of network resources. Congestion-aware routing algorithms can greatly improve the network performance by balancing the traf...
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ISBN:
(纸本)9783981080186
Congestion occurs frequently in Networks-on-Chip when the packets demands exceed the capacity of network resources. Congestion-aware routing algorithms can greatly improve the network performance by balancing the traffic load in adaptive routing. Commonly, these algorithms either rely on purely local congestion information or take into account the congestion conditions of several nodes even though their statuses might be out-dated for the source node, because of dynamically changing congestion conditions. In this paper, we propose a method to utilize both local and non-local network information to determine the optimal path to forward a packet. The non-local information is gathered from the nodes that not only are more likely to be chosen as intermediate nodes in the routing path but also provide up-to-date information to a given node. Moreover, to collect and deliver the non-local information, a distributed propagation system is presented.
Efficient routing algorithms can provide significant benefits in a mobile ad hoc network in terms of higher throughput, lower end to end delay, and improved network performance. Many routing protocols have been propos...
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ISBN:
(纸本)9781467309479;9781467309462
Efficient routing algorithms can provide significant benefits in a mobile ad hoc network in terms of higher throughput, lower end to end delay, and improved network performance. Many routing protocols have been proposed to efficiently discover paths from a source node to a destination node in a mobile ad hoc network. In this paper, we compare the performance of two well-known routing protocols: the ad hoc on demand distance vector routing protocol (AODV) and the optimized link state routing protocol (OLSR). Existing work has studied the routing protocols under idealistic settings where all nodes function properly. Our work addresses realistic settings where some nodes may be faulty resulting in the degradation of the performance of routing protocols. Extensive simulations were performed to analyze the impact of the number of faulty nodes on the performance of the routing protocols. Our results show that AODV outperforms OLSR in terms of packet delivery ratio while OLSR achieves a much lower end to end delay.
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