Electrowetting-on-dielectric (EWOD) chips have become the most popular actuator particularly for droplet-based digital microfluidic (DMF) systems. In order to enable the electrical manipulations, wire routing is a key...
详细信息
ISBN:
(纸本)9781467307727
Electrowetting-on-dielectric (EWOD) chips have become the most popular actuator particularly for droplet-based digital microfluidic (DMF) systems. In order to enable the electrical manipulations, wire routing is a key problem in designing EWOD chips. Unlike traditional very-large-scale-integration (VLSI) routing problems, in addition to routing-path establishment on signal pins, the EWOD-chip routing problem needs to address the issue of signal sharing for pin-count reduction under a practical constraint posed by limited pin-count supply. Moreover, EWOD-chip designs might incur several obstacles in the routing region due to embedded devices for specific fluidic protocols. However, no existing works consider the EWOD-chip routing with obstacles. To remedy this insufficiency, we propose in this paper the first obstacle-avoiding routing algorithm for pin-constrained EWOD chips. Our algorithm, based on effective integer-linear-programming (ILP) formulation as well as efficient routing framework, can achieve high routability with a low design complexity. Experimental results based on real-life chips with obstacles demonstrate the high routability of our obstacle-avoiding routing algorithm for pin-constrained EWOD chips.
This paper proposes two routing algorithms, namely, enhanced alternative path routing and impairment aware fault tolerant routing. Their performance is presented under different fault conditions like multiple link fai...
详细信息
ISBN:
(纸本)9781467347181
This paper proposes two routing algorithms, namely, enhanced alternative path routing and impairment aware fault tolerant routing. Their performance is presented under different fault conditions like multiple link failures, node failures and physical layer impairments.
The simplicity of regular mesh topology Network on Chip (NoC) architecture leads to reductions in design time and manufacturing cost. A weakness of the regular shaped architecture is its inability to efficiently suppo...
详细信息
The simplicity of regular mesh topology Network on Chip (NoC) architecture leads to reductions in design time and manufacturing cost. A weakness of the regular shaped architecture is its inability to efficiently support cores of different sizes. A proposed way in literature to deal with this is to utilize the region concept, which helps to accommodate cores larger than the the size in mesh topology NoC architectures. Region concept offers many new opportunities for NoC design, as well as provides new design issues and challenges. One of the most important among these is the design of an efficient deadlock free routing algorithm. Available adaptive routing algorithms developed for regular mesh topology cannot ensure freedom from deadlocks. In this paper, we list and discuss many new design issues which need to be handled for designing NoC systems incorporating cores larger than the the size. We also present and compare two deadlock free routing algorithms for mesh topology NoC with regions. The idea of the first algorithm is borrowed from the area of fault tolerant networks, where a network topology is rendered irregular due to faults in routers or links, and is adapted for the new context. We compare this with an algorithm designed using a methodology for design of application specific routing algorithms for communication networks. The application specific routing algorithm tries to maximize adaptivity by using static and dynamic communication requirements of the application. Our study shows that the application specific routing algorithm not only provides much higher adaptivity, but also superior performance as compared to the other algorithm in all traffic cases. But this higher performance for the second algorithm comes at a higher area cost for implementing network routers. (C) 2007 Elsevier B.V. All rights reserved.
Cluster-Tree routing algorithm of ZigBee network is considered as a parent-child relationship to route. For the networks which have large depth, the forward of data packet makes the energy loss of parent node increase...
详细信息
This paper presents a fault tolerant routing algorithm for injured hypercube. The proposed routing algorithm backtracks from the faulty nodes using stacks of passed nodes embedded in the header of messages. When a nod...
详细信息
ISBN:
(纸本)9781467314824;9781467314817
This paper presents a fault tolerant routing algorithm for injured hypercube. The proposed routing algorithm backtracks from the faulty nodes using stacks of passed nodes embedded in the header of messages. When a node receives a new message, a set of possible destinations for the message is formed using the mentioned stack. This helps the receiving node to detect its adjacent faulty nodes and to prevent the message to pass through the corresponding links. In this way, the proposed algorithm efficiently works with any number of faulty nodes in the network. Deadlock freedom of the proposed routing algorithm is obtained by the lowest possible requirements i.e., one virtual channel per each physical channel. In order to evaluate the proposed routing algorithm, a 7-dimentional hypercube network is simulated in various conditions i.e., different traffic rates, different number of faulty nodes, and different message lengths. Simulation results confirm that the proposed routing algorithm in comparison with the previously proposed routings: 1) provides an average of 20% improvement in the performance of the network, and 2) increases the reliability of the network.
The inherent spatio-temporal unevenness of traffic flows in Networks-on-Chips (NoCs) can cause unforeseen, and in cases, severe forms of congestion, known as hotspots. Hotspots reduce the NoC's effective throughpu...
详细信息
ISBN:
(纸本)9781467330527
The inherent spatio-temporal unevenness of traffic flows in Networks-on-Chips (NoCs) can cause unforeseen, and in cases, severe forms of congestion, known as hotspots. Hotspots reduce the NoC's effective throughput, where in the worst case scenario, the entire network can be brought to an unrecoverable halt as a hotspot(s) spreads across the topology. To alleviate this problematic phenomenon several adaptive routing algorithms employ online load-balancing functions, aiming to reduce the possibility of hotspots arising. Most, however, work passively, merely distributing traffic as evenly as possible among alternative network paths, and they cannot guarantee the absence of network congestion as their reactive capability in reducing hotspot formation(s) is limited. In this paper we present a new pro-active Hotspot-Preventive routing Algorithm (HPRA) which uses the advance knowledge gained from network-embedded Artificial Neural Network-based (ANN) hotspot predictors to guide packet routing across the network in an effort to mitigate any unforeseen near-future occurrences of hotspots. These ANNs are trained offline and during multicore operation they gather online buffer utilization data to predict about-to-be-formed hotspots, promptly informing the HPRA routing algorithm to take appropriate action in preventing hotspot formation(s). Evaluation results across two synthetic traffic patterns, and traffic benchmarks gathered from a chip multiprocessor architecture, show that HPRA can reduce network latency and improve network throughput up to 81% when compared against several existing state-of-the-art congestion-aware routing functions. Hardware synthesis results demonstrate the efficacy of the HPRA mechanism.
In large parallel computers routing is a key design point to obtain the maximum possible performance out of the interconnection network. routing can be classified into two categories depending on the number of routing...
详细信息
ISBN:
(纸本)9781467345651;9780769549033
In large parallel computers routing is a key design point to obtain the maximum possible performance out of the interconnection network. routing can be classified into two categories depending on the number of routing options that a packet can use to go from its source to its destination. If the packet can only use a single predetermined path then the routing is deterministic, whereas if several paths are possible it is adaptive. It is a well-known fact that adaptive routing usually outperforms deterministic routing;but in this paper we take the challenge of developing a HOL-blocking-aware deterministic routing algorithm that can obtain a similar or even better performance than adaptive routing, while decreasing its implementation complexity and providing some inherent advantages to deterministic routing such as in-order delivery of packets. In this large computers regular direct topologies are widely-used, so in this paper we focus on meshes and tori.
This paper presents a novel routing protocol based on the Learning Automata method for large scale Wireless Sensor Networks (WSNs) codenamed DRLR (distributed reinforcement learning routing). In this method, each node...
详细信息
ISBN:
(纸本)9781467301589
This paper presents a novel routing protocol based on the Learning Automata method for large scale Wireless Sensor Networks (WSNs) codenamed DRLR (distributed reinforcement learning routing). In this method, each node is equipped with learning automata so that it can learn the best path to transmit data toward the sink. The approach proved to be efficient, reliable, and scalable. It also prevents routing hole by considering network density and average of energy levels available. The approach also increases network lifetime by balancing energy consumption. We compared our approach to two other methods (MMSPEED and EESPEED) and the simulation results show our algorithm to better meet end-to-end delay and reliability requirements and to improve network lifetime more
This paper gives a survey in QoS routing Architecture implemented by Dijkstra's algorithm. The performance of QoS routing architecture is evaluated by made a comparison between the Shortest Path routing and QoS on...
详细信息
In this paper, we propose a new class of graphs called generalized recursive circulant graphs which is an extension of recursive circulant graphs. While retaining attractive properties of recursive circulant graphs, t...
详细信息
In this paper, we propose a new class of graphs called generalized recursive circulant graphs which is an extension of recursive circulant graphs. While retaining attractive properties of recursive circulant graphs, the new class of graphs achieve more flexibility in varying the number of vertices. Some network properties of recursive circulant graphs, like degree, connectivity and diameter, are adapted to the new graph class with more concise expression. In particular, we use a multidimensional vertex labeling scheme in generalized recursive circulant graphs. Based on the labeling scheme, a shortest path routing algorithm for the graph class is proposed. The correctness of the routing algorithm is also proved in this paper.
暂无评论