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Accelerating Huffman Encoding Using 512-Bit simd instructions

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 2024年第1期70卷 554-563页

作者： Yu, Yue Zhao, Zhe Lin, Sian-Jheng Li, Weihai Univ Sci & Technol China Sch Cyberspace Sci & Technol CAS Key Lab Electromagnet Space Informat Hefei 230026 Peoples R China

Based on 512-bit simd instructions, a Huffman encoding implementation, termed Huffman-simd, is proposed. The proposed implementation consists of four parts: establishing the Huffman coding table, data initialization, look-up table, and shifting and merging data. We establish the code table according to the characteristics of simd instructions. The code table is divided into eight sub-tables, with every two sub-tables in a group. It uses flag bits in each storage item to distinguish codewords from non-codewords, so the code table does not need to store the length of codewords in order to reduce the use of registers. After accelerating the table lookup operation using simd instruction, the valid size in each entry is different. Therefore, the shift merging algorithm is designed to operate on data and eliminate the spacing between data. This paper uses three datasets, Calgary, Silesia and Canterbury, to evaluate the implementation and compare it with the existing Huff0 library. The throughput is improved by 12.01% on average. Thus the implementation proposed in this paper improves the coding efficiency.

关键词： Encoding Symbols Decoding Codes Throughput Registers Huffman coding Huffman code simd instructions encoding algorithm

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A Portable DSP Coprocessor Design Using RISC-V Packed-simd instructions 56

A Portable DSP Coprocessor Design Using RISC-V Packed-SIMD I...

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56th IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Li, Kai Yin, Wei Liu, Qiang Tianjin Univ Tianjin Key Lab Imaging & Sensing Microelect Tech Sch Microelect Tianjin 300072 Peoples R China

ISBN: (纸本)9781665451093

This paper presents a portable coprocessor to accelerate digital signal processing (DSP) applications for low power Internet-of-Things (IoT) devices. The DSP coprocessor is based on RISC-V packed-simd instructions, and can be tightly integrated with various RISC-V cores as an independent IP by using an extension interface. The DSP coprocessor is verified on a Nexys A7 FPGA. The experimental method includes comparing the clock cycles of hamming codes, fast Fourier transforms (FFT) and digital filters running on the DSP coprocessor integrated with RISC-V cores and on original RISC-V cores. The results demonstrate a significant clock cycle reduction by up to 79.03%, 49.57% and 61.58%, respectively.

关键词： DSP RISC-V simd instructions IoT devices

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Efficient computation of positional population counts using simd instructions

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2021年第17期33卷 e6304-e6304页

作者： Klarqvist, Marcus D. R. Mula, Wojciech Lemire, Daniel Univ Cambridge Dept Genet Cambridge England Wellcome Sanger Inst Cambridge England Univ Quebec TELUQ 5800 St Denis St Quebec City PQ H2S 3L5 Canada

In several fields such as statistics, machine learning, and bioinformatics, categorical variables are frequently represented as one-hot encoded vectors. For example, given eight distinct values, we map each value to a byte where only a single bit has been set. We are motivated to quickly compute statistics over such encodings. Given a stream of k-bit words, we seek to compute k distinct sums corresponding to bit values at indexes 0, 1, 2, horizontal ellipsis , k - 1. If the k-bit words are one-hot encoded then the sums correspond to a frequency histogram. This multiple-sum problem is a generalization of the population-count problem where we seek the sum of all bit values. Accordingly, we refer to the multiple-sum problem as a positional population-count. Using simd (Single Instruction, Multiple Data) instructions from recent Intel processors, we describe algorithms for computing the 16-bit position population count using less than half of a CPU cycle per 16-bit word. Our best approach uses up to 400 times fewer instructions and is up to 50 times faster than baseline code using only regular (non-simd) instructions, for sufficiently large inputs.

关键词： bioinformatics genomics population counts sequencing simd instructions software performance vectorization

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FSCS-simd: An efficient implementation of Fixed-Size-Candidate-Set adaptive random testing using simd instructions 31

FSCS-SIMD: An efficient implementation of Fixed-Size-Candida...

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IEEE 31st International Symposium on Software Reliability Engineering (ISSRE)

作者： Ashfaq, Muhammad Huang, Rubing Omari, Michael Jiangsu Univ Sch Comp Sci & Commun Engn Zhenjiang Jiangsu Peoples R China

ISBN: (纸本)9781728198705

The Fixed-Size-Candidate-Set (FSCS) version of Adaptive Random Testing (ART) attempts to enhance the fault-detection effectiveness of Random Testing (RT) by generating new test cases that are far away from previously executed test cases. Despite its simplicity and good fault-detection effectiveness, FSCS suffers from a very high time cost mainly due to its Single-Instruction-Single-Data (SISD) mechanism for its distance calculation process. To overcome this drawback, in this paper, we propose a novel and efficient implementation of FSCS, namely Fixed-Sized-Candidate-Set using Single-Instruction-Multiple-Data (FSCS-simd), which employs simd instruction architecture for simultaneous distance calculations of multiple test cases in a many-to-many style. Compared with the original FSCS, our proposed method loads a batch of multiple test cases from the candidate test case set and executed test case set in one CPU execution cycle. After that, a single distance calculation instruction is given to the whole batch for the calculation of all pairwise distances. We conducted a series of simulations and empirical studies to evaluate testing effectiveness and efficiency of our proposed method against FSCS. Our results show that, on average, FSCS-simd reduces test case generation overhead of FSCS up to 90%, while maintaining the comparable fault-detection effectiveness.

关键词： Software testing adaptive random testing FSCS simd instructions testing efficiency

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Thwarting Fault Attacks against Lightweight Cryptography using simd instructions

Thwarting Fault Attacks against Lightweight Cryptography usi...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Lac, Benjamin Canteaut, Anne Fournier, Jacques J. A. Sirdey, Renaud CEA Tech Gardanne France INRIA Paris France Univ Grenoble Alpes CEA LETI DSYS LSOSP F-38000 Grenoble France CEA List Saclay France ENSM SE St Etienne France

ISBN: (纸本)9781538648810

A growing number of connected objects, with their high performance and low-resources constraints, are embedding lightweight ciphers for protecting the confidentiality of the data they manipulate or store. Since those objects are easily accessible, they are prone to a whole range of physical attacks, one of which are fault attacks against which countermeasures are usually expensive to implement, especially on off-the-shelf devices. For such devices, we propose a new generic software countermeasure, using simd instructions available in almost any off-the-shelf devices, to thwart most fault attacks while preserving the performances of the targeted cipher.

关键词： IRC Fault attacks Software countermeasures Lightweight cryptography simd instructions

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On-demand JSON: A better way to parse documents?

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SOFTWARE-PRACTICE & EXPERIENCE 2024年第6期54卷 1074-1086页

作者： Keiser, John Lemire, Daniel Univ Quebec TELUQ DOT Lab Res Ctr Montreal H2S 3L5 PQ Canada

JSON is a popular standard for data interchange on the Internet. Ingesting JSON documents can be a performance bottleneck. A popular parsing strategy consists in converting the input text into a tree-based data structure-sometimes called a Document Object Model or DOM. We designed and implemented a novel JSON parsing interface-called On-Demand-that appears to the programmer like a conventional DOM-based approach. However, the underlying implementation is a pointer iterating through the content, only materializing the results (objects, arrays, strings, numbers) lazily. On recent commodity processors, an implementation of our approach provides superior performance in multiple benchmarks. To ensure reproducibility, our work is freely available as open source software. Several systems use On Demand: for example, Apache Doris, the *** JavaScript runtime, Milvus, and Velox.

关键词： JSON performance semi-structured documents simd instructions text processing

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An Optimized Isomorphic Design for the SM4 Block Cipher Over the Tower Field 21

An Optimized Isomorphic Design for the SM4 Block Cipher Over...

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21st IEEE International Conference on Trust, Security and Privacy in Computing and Communications (IEEE TrustCom)

作者： Wang, Chuang Ding, Yan Huang, Chenlin Song, Liantao Natl Univ Def Technol Sch Comp Changsha Peoples R China

ISBN: (纸本)9781665494250

The SM4 block cipher is Chinese domestic cryptography widely used to secure data confidentiality. Its performance is a key indicator in measuring the efficiency of encryption and decryption in large-scale data scenarios. In traditional tower field optimization, the paired forward and backward linear filed transformations are sandwiched between S-boxes and L-boxes for every round of the encryption operation, which introduces heavily burdensome computation times and complexity. In this paper, we propose a novel isomorphic design for the SM4 round function, where all operations are remaining in the tower filed through multiple rounds, and the paired forward and backward field transformations in each round can be omitted. Based on the isomorphic design, we introduce a more flexible fine-grained bitsliced scheme for the SM4 block cipher with the simd instructions, requiring only 32 independent data blocks to be processed in parallel. The experiments show that the proposed isomorphic design for the round function is superior to the traditional design, and the fine-grained bitsliced SM4 implementation on the server device and terminal device achieved 6.4 and 17.2 cycles per byte respectively, showing a performance increase of 284.3% and 54.4% compared to OpenSSL implementation(24.7 and 26.6 cycles per byte respectively).

关键词： SM4 algorithm tower field bitslice simd instructions

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Thermal design power and vectorized instructions behavior

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2022年第2期34卷

作者： Guermouche, Amina Orgerie, Anne-Cecile Inst Polytech Paris Telecom SudParis Evry France Univ Rennes CNRS IRISA INRIA Rennes France

Vectorized instructions were introduced to improve the performance of applications. However, they come at the cost of an increase in the power consumption. As a consequence, processors are designed to limit their frequency when such instructions are used in order to respect the thermal design power limit. In this paper, we study and compare the impact of thermal design power and Simple Instruction Multiple Data (simd) instructions on performance, power and energy consumption of processors and memory. The study is performed on three different architectures providing different characteristics and four applications with different profiles (including one application with different phases, each phase having a different profile). The study shows that, because of processor frequency, performance and power consumption are strongly related to thermal design power. It also shows that AVX512 has unexpected behavior regarding processor power consumption, while DRAM power consumption is impacted by simd instructions because of the generated memory throughput. Finally, this paper tackles the impact of turboboost which shows equivalent to better performance for all the studied cases while not always decreasing energy consumption.

关键词： energy efficiency memory power consumption simd instructions TDP turboboost

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Accelerating Pattern Matching on Intel Xeon Phi Processors 20th

Accelerating Pattern Matching on Intel Xeon Phi Processors

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20th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP)

作者： Sanz, Victoria Pousa, Adrian Naiouf, Marcelo De Giusti, Armando Natl Univ La Plata III LIDI Sch Comp Sci La Plata Argentina CIC Buenos Aires DF Argentina Consejo Nacl Invest Cient & Tecn Buenos Aires DF Argentina

ISBN: (纸本)9783030602451;9783030602444

Pattern matching algorithms are used in several areas such as network security, bioinformatics and text mining. In order to provide real-time response for large inputs, high-performance systems should be used. However, this requires adapting the algorithm to the underlying architecture. Intel Xeon Phi processors have attracted attention in recent years because they offer massive parallelism, good programmability and portability. In this paper, we present a pattern matching algorithm that exploits the full computational power of Intel Xeon Phi processors by using both simd and thread parallelism. We evaluate our algorithm on a Xeon Phi 7230 Knights Landing processor and measure its performance as the data size and the number of threads increase. The results reveal that both parallelism methods provide performance gains. Also they indicate that our algorithm is up to 63x faster than its serial counterpart and behaves well as the workload is increased.

关键词： Pattern matching Intel Xeon Phi Knights Landing processor simd instructions Thread-level parallelism Aho-Corasick

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A simd intrinsic correlator library for GNSS software receivers

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GPS SOLUTIONS 2019年第3期23卷 1页

作者： Miralles, Damian Akos, Dennis M. Univ Colorado Ann & HJ Smead Aerosp Engn Sci Boulder CO 80309 USA

An open-source implementation of a code division multiple access software correlator library that leverages single instruction multiple data (simd) is presented. We initially discuss the key aspects involved in the correlation operation for software radio applications. Afterward, we present the state-of-the-art application programming interface that provides simd capable methods for each of the components in a correlation operation, including the first of its kind parallelized code and carrier generation using lookup tables and simd instructions. The library was developed using simd intrinsic instructions, which are a C-type nomenclature offering access to the assembly instructions originally designed for the simd extensions in the processor. This design paradigm presents an advantage in terms of readability and simplified code development to accommodate future modifications. Recorded data were used with a standalone global navigation satellite system software receiver where the methods hereby presented were tested and profiled to validate theoretical assumptions.

关键词： GNSS correlation simd instructions Software radio

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