检索结果-内蒙古大学图书馆

simd vectorization for simultaneous solution of locally varying linear systems with multiple right-hand sides

JOURNAL OF SUPERCOMPUTING 2023年第13期79卷 14684-14706页

作者： Kuehn, Martin J. Holke, Johannes Lutz, Annette Thies, Jonas Roehrig-Zoellner, Melven Bleh, Alexander Backhaus, Jan Basermann, Achim German Aerosp Ctr DLR Inst Software Technol Dept High Performance Comp Cologne Germany Tech Univ Darmstadt Dept Math Darmstadt Germany Delft Univ Technol Inst Appl Math Delft Netherlands German Aerosp Ctr DLR Inst Prop Technol Dept Numer Methods Cologne Germany

Developments in numerical simulation of flows and high-performance computing influence one another. More detailed simulation methods create a permanent need for more computational power, while new hardware developments often require changes to the software to exploit new hardware features. This dependency is very pronounced in the case of vector-units which are featured by all modern processors to increase their numerical throughput but require vectorization of the software to be used efficiently. We study the vectorization of a simulation method that exhibits an inherent level of vector-parallelism. This is of particular interest as simd operations will hopefully be available with std::simd in a future C++ standard. The simulation method considered here results in the simultaneous solution of multiple sparse linear systems of equations which only differ by their main diagonal and right-hand sides. Such structure arises in the simulation of unsteady flow in turbomachinery by means of a frequency domain approach called harmonic balance.

关键词： Sparse iterative solvers High-performance computing Performance engineering simd optimization Computational fluid dynamics Frequency domain methods

来源：评论

学校读者我要写书评

暂无评论

An Optimized H.266/VVC Software Decoder On Mobile Platform 35

An Optimized H.266/VVC Software Decoder On Mobile Platform

引用

Picture Coding Symposium (PCS)

作者： Li, Yiming Liu, Shan Chen, Yu Zheng, Yushan Chen, Sijia Zhu, Bin Lou, Jian Tencent Media Lab Shenzhen Peoples R China Tencent Media Lab Palo Alto CA USA

ISBN: (纸本)9781665425452

As the successor of H.265/HEVC, the new versatile video coding standard (H.266/VVC) can provide up to 50% bitrate saving with the same subjective quality, at the cost of increased decoding complexity. To accelerate the application of the new coding standard, a real-time H.266/VVC software decoder that can support various platforms is implemented, where simd technologies, parallelism optimization, and the acceleration strategies based on the characteristics of each coding tool are applied. As the mobile devices have become an essential carrier for video services nowadays, the mentioned optimization efforts are not only implemented for the x86 platform, but more importantly utilized to highly optimize the decoding performance on the ARM platform in this work. The experimental results show that when running on the Apple A14 SoC (iPhone 12pro), the average single-thread decoding speed of the present implementation can achieve 53fps (RA and LB) for full HD (1080p) bitstreams generated by VTM-11.0 reference software using 8bit Common Test Conditions (CTC). When multi-threading is enabled, an average of 32 fps (RA) can be achieved when decoding the 4K bitstreams.

关键词： H.266 Versatile Video Coding (VVC) Video decoding ARM simd optimization

来源：评论

学校读者我要写书评

暂无评论

Effective Exploitation of simd Resources in Cross-ISA Virtualization 2021

Effective Exploitation of SIMD Resources in Cross-ISA Virtua...

引用

17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (VEE)

作者： Wu, Jin Dong, Jian Fang, Ruili Zhao, Ziyi Gong, Xiaoli Wang, Wenwen Zuo, Decheng Harbin Inst Technol Harbin Peoples R China Univ Georgia Athens GA 30602 USA Nankai Univ Tianjin Peoples R China

ISBN: (纸本)9781450383943

System virtualization is a fundamental technology that enables many important applications. However, existing virtualization techniques suffer from a critical limitation due to their limited exploitation of host simd hardware resources, especially when a guest application does not have inherently fine-grained data-level parallelism. To bridge this utilization gap and unleash the full potential of host simd resources, this paper proposes an effective and unconventional simd exploitation technique. The proposed exploitation takes advantage of ample host simd registers and powerful host simd instructions to generate more efficient host binary code for guest applications even without any fine-grained data-level parallelism. It also mitigates the shortage of general-purpose registers on the host platform, as well as improves the efficiency of accessing guest registers. We have implemented the exploitation in an extensively-used virtualization platform, QEMU. Experimental results on a comprehensive list of benchmarks from PARSEC, SPEC-CPU2017, and Google Octane JavaScript benchmark suite show that an average of 2.2X performance speedup can be achieved for AArch64 binaries on an x86-64 host machine. We believe the proposed technique will provide a new perspective for our community to rethink the exploitation of simd hardware resources.

关键词： simd optimization Cross-ISA virtualization Dynamic binary translation QEMU

来源：评论

学校读者我要写书评

暂无评论

simd-Matcher: A simd-based Arbitrary Matching Framework

引用

ACM TRANSACTIONS ON ARCHITECTURE AND CODE optimization 2022年第3期19卷 30-30页

作者： Wang, Ping Wen, Fei Gratz, Paul, V Sprintson, Alex Texas A&M Univ Dept Elect & Comp Engn 400 Bizzell St College Stn TX 77840 USA

Packet classification methods rely upon matching packet content/header against pre-defined rules, which are generated by network applications and their configurations. With the rapid development of network technology and the fast-growing network applications, users seek more enhanced, secure, and diverse network services. Hence it becomes critical to improve the performance of arbitrary matching operations. This article presents simd-Matcher, an efficient Single Instruction Multiple Data (simd) and cachefriendly arbitrary matching framework. To further improve the arbitrary matching performance, simdMatcher adopts a trie node with a fixed high fanout and a varying span for each node depending on the data distribution. The trie node layout leverages cache and modern processor features such as simd instructions. To support arbitrary matching, we first interpret arbitrary rules into three fields: value, mask, and priority. Second, to support insertion of randomly positioned wildcards to arbitrary rules, we propose the simd-Matcher extraction algorithm to process the wildcard bits. Third, we add an array of wildcard entries to the leaf entries, which store the wildcard rules and guarantee the correctness of matching results. Experiments show that simd-Matcher outperforms GenMatcher under large-scale ruleset and key set, in terms of search time, insert time, and memory cost. Specifically with 5M rules, our method achieves a 2.7X speedup on search time, and the insertion time takes similar to 7.3 seconds, gaining a 1.38X speedup;meanwhile, the memory cost reduction is up to 6.17X.

关键词： Arbitrary matching simd optimization performance trade-off

来源：评论

学校读者我要写书评

暂无评论

Improvement in interactive remote in situ visualization using simd-aware function parser and asynchronous data I/O

引用

JOURNAL OF VISUALIZATION 2020年第4期23卷 695-706页

作者： Kawamura, Takuma Idomura, Yasuhiro Japan Atom Energy Agcy Ctr Computat Sci & E Syst 178-4 Wakashiba Kashiwa Chiba Japan

An in situ visualization system based on the particle-based volume rendering offers a highly scalable and flexible visual analytics environment based on multivariate volume rendering. Although it showed excellent computational performance on the conventional CPU platforms, accelerated computation on the latest many core platforms revealed performance bottlenecks related to a function parser and particles I/O. The function parsers handle multidimensional transfer functions, but conventional implementation was not optimized for wide simd widths. The I/O bottleneck comes from the latency of output of particle data files. In this paper, we develop a new simd-aware function parser and an asynchronous data I/O method based on task-based thread parallelization. The particle generation process is optimized by loop blocking to take advantage of the new function parser. Numerical experiments on the Oakforest-PACS, which consists of 8208 Intel Xeon Phi7250 (Knights Landing) processors, demonstrate an order of magnitude speedup with keeping improved strong scaling up to similar to 100k cores.

关键词： In situ visualization Visualization framework HPC Volume rendering simd optimization

来源：评论

学校读者我要写书评

暂无评论

IMPLEMENTATION OF HEVC DECODER ON X86 PROCESSORS WITH simd optimization

IMPLEMENTATION OF HEVC DECODER ON X86 PROCESSORS WITH SIMD O...

引用

IEEE Visual Communications and Image Processing (VCIP)

作者： Yan, Leju Duan, Yizhou Sun, Jun Guo, Zongming Peking Univ Inst Comp Sci & Technol Beijing 100871 Peoples R China

ISBN: (纸本)9781467344050;9781467344067

High Efficient Video Coding (HEVC) is the next generation video coding standard in progress. Based on the traditional hybrid coding framework, HEVC implements enhanced tools to improve compression efficiency at the cost of far more computational payload than the capacity of real-time video applications. In this paper, we focus on the software implementation of a real-time HEVC decoder over modern Intel x86 processors. First, we identify the most time-consuming modules of HM 4.0 decoder, represented by motion compensation, adaptive loopfilter, deblocking filter and integer transform. Then the single-execution-multiple-data (simd) methods are proposed to optimize the computational performance of these modules. Experimental results show that the optimized decoder is more than 4 times faster than the HM 4.0 decoder, with decoding speed of over 40 frames per second for 1920x1080 resolution videos on Intel i5-2400 processor.

关键词： HEVC MMX/SSE technologies simd optimization

来源：评论

学校读者我要写书评

暂无评论

An Efficient simd Implementation of the H.265 Decoder for Mobile Architecture 18th

An Efficient SIMD Implementation of the H.265 Decoder for Mo...

引用

18th International Conference on Image Analysis and Processing (ICIAP)

作者： Bariani, Massimo Lambruschini, Paolo Raggio, Marco Pezzoni, Luca Univ Genoa DITEN Genoa Italy STMicroelect AST Milan Italy

ISBN: (纸本)9783319232225;9783319232218

This paper focuses on an efficient optimization of the H.265 video decoder on suitable architectures for mobile devices. The solutions developed to support the H.265 features, and the achieved performances are shown. The most demanding modules have been optimized with Single Instruction Multiple Data (simd) instructions and we keep in special account the memory handling, with the minimization of the memory transfer. The effectiveness of the proposed solutions has been demonstrated on ARM architecture. In particular, we have selected the dual-core Cortex A9 processor with NEON simd extension.

关键词： H.265 simd optimization ARM NEON Video compression Mobile application

来源：评论

学校读者我要写书评

暂无评论

An Optimized simd Implementation of the HEVC/H.265 Video Decoder

An Optimized SIMD Implementation of the HEVC/H.265 Video Dec...

引用

13th Annual Wireless Telecommunications Symposium (WTS)

作者： Bariani, M. Lambruschini, P. Raggio, M. Pezzoni, L. Univ Genoa Dept Elect Elect Telecommun Engn & Naval Architec Genoa Italy STMicroelectronics Adv Syst Technol Milan Italy

ISBN: (纸本)9781479912971

This paper focuses on the optimization process of the HEVC/H. 265 video decoder on suitable architectures for mobile devices. The solutions developed to support the new HEVC/H. 265 features are shown together with the achieved performance. The HEVC/H. 265 decoder complexity has been evaluated and the most demanding modules have been optimized with Single Instruction Multiple Data (simd) instructions. Even though the here described approach has a general meaning, the effectiveness of the proposed solutions has been demonstrated on ARM architecture. In particular, we have selected the Cortex A9 processor with NEON simd extension. We will demonstrate that the resulting HEVC/H. 265 application can decode in real-time 720p (1280x720) streams at 30 frames per second on a single core ARMv7 at 1.2 GHz.

关键词： HEVC/H.265 simd optimization ARM NEON video compression mobile application

来源：评论

学校读者我要写书评

暂无评论

Software News and Updates Performance Enhancements for GROMACS Nonbonded Interactions on BlueGene

引用

JOURNAL OF COMPUTATIONAL CHEMISTRY 2011年第9期32卷 2041-2046页

作者： Abraham, Mark J. Australian Natl Univ John Curtin Sch Med Res Computat Prote Grp Canberra ACT 2601 Australia

Several improvements to the previously optimized GROMACS BlueGene inner loops that evaluate nonbonded interactions in molecular dynamics simulations are presented. The new improvements yielded an 11% decrease in running time for both PME and other kinds of GROMACS simulations that use nonbonded table look-ups. Some other GROMACS simulations will show a small gain. (C) 2011 Wiley Periodicals, Inc. J Comput Chem 32:2041-2046, 2011

关键词： BlueGene PowerPC GROMACS simd optimization rounding table lookups

来源：评论

学校读者我要写书评

暂无评论

A HIGH SPEED TURBO DECODER IMPLEMENTATION FOR CPU-BASED SDR SYSTEM

A HIGH SPEED TURBO DECODER IMPLEMENTATION FOR CPU-BASED SDR ...

引用

2011 International Conference on Communications Technology and Applications(2011年通信技术与应用国际会议 ICCTA 2011)

作者： Lin Huang Yajuan Luo Hao Wang Feng Yang Zhenning Shi Daqing Gu Wireless Communication Group Orange Labs Beijing 100080 China

ISBN: (纸本)9781618399267

More and more CPU-based SDR systems appear in recent two years. Such system requires high speed real-time signal processing. In this paper, we present our effort on the speed optimization of Turbo decoder, the most computation-demanding module in all baseband modules. We jointly consider the algorithm parallelism and the processor architecture. Single Instruction Multiple Data (simd) instruction is used for software implementation. The evaluation results show that this proposed design can achieve a maximum of 124 Mbps throughput for single Soft Input Soft Output (SISO) module with Max-Log-MAP algorithm.

关键词： Turbo decoder MAP algorithm CPU-based SDR simd optimization

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：