Multiplication plays a critical role in sram-based computing-in-memory (CIM) architectures. However, current sram-based CIMs face three major limitations. First, they do not fully exploit bit-level sparsity, resulting...
详细信息
Multiplication plays a critical role in sram-based computing-in-memory (CIM) architectures. However, current sram-based CIMs face three major limitations. First, they do not fully exploit bit-level sparsity, resulting in unnecessary overhead in both latency and energy consumption. Second, the generation of numerous zero-dot products is superfluous. Third, the irregular organization of sram complicates the *** address these issues, we propose Shift-CIM, a general-purpose approach that fully leverages bit-level sparsity within sram-based multiplications. Shift-CIM aligns the multipliers within the sram array, accumulating only the required dot products based on the non-zero bits of the multipliers. Shift-CIM achieves a regular sram organization by assembling two irregular sram arrays in a transposed *** evaluations show that Shift-CIM is highly efficient, operating at a supply voltage of 0.9V and a frequency of 833MHz, while incurring only a 4.8% area overhead. Despite these modest requirements, Shift-CIM significantly accelerates multiplication operations, achieving up to 3.08 × the performance improvement and a 60% reduction in energy consumption compared to state-of-the-art designs.
暂无评论