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检索条件"主题词=SYNCHRONOUS PROGRAMMING"

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Scheduling synchronous Tutoring Sessions in Learning Activities 21st

Scheduling Synchronous Tutoring Sessions in Learning Activit...

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21st International Conference on Interactive Collaborative Learning (ICL) / 47th IGIP International Conference on Engineering Pedagogy - Teaching and Learning in a Digital World

作者： Gueye, Amadou Dahirou Faye, Pape Mamadou Djidiack Gueye, Bounama Lishou, Claude Alioune Diop Univ Bambey Senegal Virtual Univ Dakar Senegal Cheikh Anta Diop Univ Dakar Senegal

ISBN: (纸本)9783030119324;9783030119317

This paper deals with a solution allowing digital universities or distance learning structures to extend the functionalities of their distance learning platform to improve not only the management of course session activities but also the organization and synchronous scheduling of these sessions. Indeed, the major problem that is often encountered at the level of distance learning platforms is the management of course hours. This paper proposes a solution for the FOAD Moodle platform to develop a plugin offering teachers the possibility to dynamically choose their course availability and learners the possibility to visualize in real time the week's schedules. The developed plugin is integrated as a new educational resource into the Moodle platform to extend its functionality. This plugin which constitutes the originality of this paper bears the name of Planning.

关键词： Distance learning platform synchronous programming Plugin development Planning

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Contracts for Modular Discrete Controller Synthesis 10

Contracts for Modular Discrete Controller Synthesis

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ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tool for Embedded Systems

作者： Delaval, Gwenael Marchand, Herve Rutten, Eric INRIA Grenoble France INRIA Rennes France

ISBN: (纸本)9781605589534

We describe the extension of a reactive programming language with a behavioral contract construct. It is dedicated to the programming of reactive control of applications in embedded systems, and involves principles of the supervisory control of discrete event systems. Our contribution is in a language approach where modular discrete controller synthesis (DCS) is integrated, and it is concretized in the encapsulation of DCS into a compilation process. From transition system specifications of possible behaviors, DCS automatically produces controllers that make the controlled system satisfy the property given as objective. Our language features and compiling technique provide correctness-by-construction in that sense, and enhance reliability and verifiability. Our application domain is adaptive and reconfigurable systems: closed-loop adaptation mechanisms enable flexible execution of functionalities w.r.t. changing resource and environment conditions. Our language can serve programming such adaption controllers. This paper particularly describes the compilation of the language. We present a method for the modular application of discrete controller synthesis on synchronous programs, and its integration in the BZR language. We consider structured programs, as a composition of nodes, and first apply DCS on particular nodes of the program, in order to reduce the complexity of the controller computation;then, we allow the abstraction of parts of the program for this computation;and finally, we show how to recompose the different controllers computed from different abstractions for their correct co-execution with the initial program. Our work is illustrated with examples, and we present quantitative results about its implementation.

关键词： Design Languages Reliability Verification Discrete controller synthesis modularity components contracts reactive systems synchronous programming adaptive and reconfigurable systems

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Semantics-preserving multitask implementation of synchronous programs

Semantics-preserving multitask implementation of synchronous...

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2nd Embedded Systems Week

作者： Caspi, Paul Scaife, Norman Sofronis, Christos Tripakis, Stavros Verimag Lab Ctr Equat F-38610 Gieres France Verimag & Cadence Res Labs Berkeley CA 94704 USA

We study the implementation of a synchronous program as a set of multiple tasks running on the same computer, and scheduled by a real-time operating system using some preemptive scheduling policy, such as fixed priority or earliest-deadline first. Multitask implementations are necessary, for instance, in multiperiodic applications, when the worst-case execution time of the program is larger than its smallest period. In this case, a single-task implementation violates the schedulability assumption and, therefore, the synchrony hypothesis does not hold. We are aiming at semantics-preserving implementations, where, for a given input sequence, the output sequence produced by the implementation is the same as that produced by the original synchronous program, and this under all possible executions of the implementation. Straightforward implementation techniques are not semantics-preserving. We present an intertask communication protocol, called DBP, that is semantics-preserving and memory-optimal. DBP guarantees semantical preservation under all possible triggering patterns of the synchronous program: thus, it is applicable not only to time-, but also event-triggered applications. DBP works under both fixed priority and earliest-deadline first scheduling. DBP is a nonblocking protocol based on the use of intermediate buffers and manipulations of write-to/read-from pointers to these buffers: these manipulations happen upon arrivals, rather than executions of tasks, which is a distinguishing feature of DBP. DBP is memory-optimal in the sense that it uses as few buffers as needed, for any given triggering pattern. In the worst case, DBP requires, at most, N + 2 buffers for each writer, where N is the number of readers for this writer.

关键词： Embedded software Model-based design Optimality Preemptive scheduling Process communication Semantical preservation synchronous programming

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Multi-rate System Design Through Integrating synchronous Components 1

引用

12th International Colloquium on Theoretical Aspects of Computing (ICTAC)

作者： Sun, Ke Univ Rennes 1 F-35042 Rennes France

ISBN: (数字)9783319251509

ISBN: (纸本)9783319251509;9783319251493

This paper presents a component-based scheme for the development of multi-rate critical embedded systems. A multi-rate system is formally specified as a modular assembly of several locally mono-clocked components into a globally multi-clocked system. Mono-clocked components are modeled in particular using the synchronous programming language Quartz. Each synchronous component is first transformed into an intermediate model of clocked guarded actions. Based on the abstraction of component behaviors, consistent communication networks can be established, in which the production and consumption of inter-component dataflow are related by affine relations. Furthermore, symbolic component schedules and corresponding minimal buffering requirements are computed.

关键词： synchronous programming Component-based design Affine relation Symbolic schedule

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Synchronized Shared Memory and Procedural Abstraction: Towards a Formal Semantics of Blech

Synchronized Shared Memory and Procedural Abstraction: Towar...

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Forum for Specification and Design Languages (FDL)

作者： Gretz, F. Grosch, F-J Mendler, M. Scheele, S. Bosch Corp Res Palo Alto CA 94304 USA Bamberg Univ Bamberg Germany

ISBN: (纸本)9781728189284

Traditional imperative synchronous programming languages heavily rely on a strict separation between data memory and communication signals. Signals can be shared between computational units but cannot be overwritten within a synchronous reaction cycle. Memory can be destructively updated but cannot be shared between concurrent threads. This incoherence makes traditional imperative synchronous languages cumbersome for the programmer. The recent definition of sequentially constructive synchronous languages offers an improvement. It removes the separation between data memory and communication signals and unifies both through the notion of clock synchronised shared memory. However, it still depends on global causality analyses which precludes procedural abstraction. This complicates reuse and composition of software components. This paper shows how procedural abstraction can be accommodated inside the sequentially constructive model of computation. We present the Sequentially Constructive Procedural Language (SCPL) and its semantic theory of policy-constructive synchronous processes. SCPL supports procedural abstractions using policy interfaces to ensure that procedure calls are memory safe, wait-free and their scheduling is determinate and causal. At the same time, a policy interface constrains the level of freedom for the implementation and subsequent refactoring of a procedure. As a result, policies enable separate compilation and composition of procedures. We present our extensions abstractly as a formal semantics for SCPL and motivate it concretely in the context of the open-source, embedded, real-time language Blech.

关键词： synchronous programming clock-synchronised shared memory procedural abstraction operational semantics

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Synchronised Shared Memory and Model Checking: A Proof of Concept

Synchronised Shared Memory and Model Checking: A Proof of Co...

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Forum on specification and Design Languages (FDL)

作者： Aguado, Joaquin Duenas, Alejandra Otto Friedrich Univ Bamberg Fac Informat Syst & Appl Comp Sci Bamberg Germany ICN Business Sch Supply Chain & Informat Syst Management Nancy France

ISBN: (纸本)9781665418256

synchronous programming (SP) is a model of computation that supports concurrent thread composition and provides deterministic observable behaviour. A recent theory has extended SP with more and higher level clock-synchronised shared memory data types. The present paper implements this clock-synchronised shared memory ( CSM) theory and applies it from a model checking perspective. In the CSM theory, types are equipped with a synchronisation policy prescribing how concurrent calls to its methods must be organised. In a policy-constructive system all access methods of all objects can be scheduled in a policy-conformant manner without deadlocking. A policy-constructive system exhibits deterministic behaviour. In our modelling, synchronous policies get codified as neverclaims in PROMELA allowing the SPIN model checker to be used for searching an execution (interleaving) that satisfies the synchronous product of the never-claims. This interleaving, if exists, provides a policy-conformant schedule for the system model. This schedule verifies that the system is policy-constructive meaning that any policy-conformant schedule results in the same deterministic, observable input-output behaviour for the system.

关键词： synchronous programming clock-synchronised shared memory model checking determinism concurrency

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Runtime Enforcement of Reactive Systems using synchronous Enforcers 24

Runtime Enforcement of Reactive Systems using Synchronous En...

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24th ACM SIGSOFT International SPIN Symposium on Model Checking of Software (SPIN)

作者： Pinisetty, Srinivas Roop, Partha S. Smyth, Steven Tripakis, Stavros von Hanxleden, Reinhard Aalto Univ Helsinki Finland Univ Gothenburg Gothenburg Sweden Univ Auckland Auckland New Zealand Univ Kiel Kiel Germany Univ Calif Berkeley Berkeley CA USA

ISBN: (纸本)9781450350778

synchronous programming is a paradigm of choice for the design of safety-critical reactive systems. Runtime enforcement is a technique to ensure that the output of a black-box system satisfies some desired properties. This paper deals with the problem of runtime enforcement in the context of synchronous programs. We propose a framework where an enforcer monitors both the inputs and the outputs of a synchronous program and (minimally) edits erroneous inputs/outputs in order to guarantee that a given property holds. We define enforceability conditions, develop an online enforcement algorithm, and prove its correctness. We also report on an implementation of the algorithm on top of the KIELER framework for the SCCharts synchronous language. Experimental results show that enforcement has minimal execution time overhead, which decreases proportionally with larger benchmarks.

关键词： Runtime Monitoring Runtime Enforcement Safety Properties Automata synchronous programming SCCharts

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A Generalized Modality for Recursion 18

A Generalized Modality for Recursion

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33rd Annual ACM/IEEE Symposium on Logic in Computer Science (LICS) held as part of the Federated Logic Conference (FLoC)

作者： Guatto, Adrien Univ Bamberg Bamberg Germany

ISBN: (纸本)9781450355834

Nakano's later modality allows types to express that the output of a function does not immediately depend on its input, and thus that computing its fixpoint is safe. This idea, guarded recursion, has proved useful in various contexts, from functional programming with infinite data structures to formulations of step-indexing internal to type theory. Categorical models have revealed that the later modality corresponds in essence to a simple reindexing of the discrete time scale. Unfortunately, existing guarded type theories suffer from significant limitations for programming purposes. These limitations stem from the fact that the later modality is not expressive enough to capture precise input-output dependencies of functions. As a consequence, guarded type theories reject many productive definitions. Combining insights from guarded type theories and synchronous programming languages, we propose a new modality for guarded recursion. This modality can apply any well-behaved reindexing of the time scale to a type. We call such reindexings time warps. Several modalities from the literature, including later, correspond to fixed time warps, and thus arise as special cases of ours.

关键词： Guarded Recursion Functional programming Streams Type Systems Category Theory synchronous programming

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Hardware Implementation of OCAML Using a synchronous Functional Language 26th

Hardware Implementation of OCAML Using a Synchronous Functio...

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26th International Symposium on Practical Aspects of Declarative Languages (PADL)

作者： Sylvestre, Loic Serot, Jocelyn Chailloux, Emmanuel Sorbonne Univ CNRS LIP6 F-75005 Paris France Univ Clermont Auvergne CNRS Inst Pascal Clermont Auvergne INP F-63000 Clermont Ferrand France

ISBN: (纸本)9783031520372;9783031520389

We present a hardware implementation of the high-level multi-paradigm language OCAML using a declarative language called Eclat. Eclat is tailored for programming reactive hardware applications mixing interaction with physical devices and long-running computations. It is compiled to synthesizable hardware descriptions for configuring Field Programmable Gate Arrays (FPGAs). We have implemented the OCAML Virtual Machine as an Eclat function to execute complex computations (programmed in OCAML) in reactive applications (programmed in Eclat). This implementation comprises a bytecode interpreter and a runtime system with automatic memory management. The OCAML programmers can customize this runtime by defining external Eclat functions, i.e., hardware accelerators.

关键词： synchronous programming functional programming language design and implementation FPGA virtual machine OCAML

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Context-Sensitive Timing Analysis of Esterel Programs 09

Context-Sensitive Timing Analysis of Esterel Programs

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46th ACM/IEEE Design Automation Conference (DAC 2009)

作者： Ju, Lei Huynh, Bach Khoa Chakraborty, Samarjit Roychoudhury, Abhik Natl Univ Singapore Dept Comp Sci Singapore Singapore Tech Univ Munich Inst Real Time Comp Syst Munich Germany

ISBN: (纸本)9781605584973

Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software - e.g., into sequential C code very conservative estimation techniques have been used, where the focus has only been on obtaining safe timing estimates and not on the cost of the implementation. While this was acceptable in avionics, efficient implementations and hence tight timing estimates are needed in more cost-sensitive application domains. Lately, a number of advances in Worst-Case Execution Time (WCET) analysis techniques, coupled with the growing use of software in domains such as automotives, have led to a considerable interest in timing analysis of code generated from Esterel specifications. In this paper we propose techniques to obtain tight estimates on the processing time of input events by sequential C code generated from Esterel programs. Execution of an Esterel program as in all other synchronous languages is logically made up of a sequence of clock ticks. In reality, they take non-zero time which depends on the generated C code as well as the underlying hardware platform on which this code is executed. Apart from exploiting the specific structure of this C code to obtain tight WCET estimates, we capture program-level contexts across ticks in order to obtain tight estimates on response times of events whose processing spans across multiple clock ticks. Such tighter estimates immediately translate into more cost-effective implementations. Our experimental results with realistic case studies show 30% reduction in timing estimates when program level context information is taken into account.

关键词： Esterel synchronous programming Worst-case Execution Time (WCET) analysis

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