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检索条件"主题词=Scheduling algorithm"

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Dynamic Audit Fair Queueing

Dynamic Audit Fair Queueing

引用

2007 International Symposium on Communications and Information Technologies (ISCIT 2007), vol.3

作者： Jui-Pin Yang Yi-Chang Zhuang Network Storage Technology Department Industrial Technology and Research Institute Tainan Taiwan

Many core-stateless bandwidth management mechanisms have been proposed to resolve the scalability problem of the core routers, but they heavily rely on the edge routers or anterior core routers to attach correct flow information to departure packets. The relevance may result in extremely unfair bandwidth sharing among populated flows;therefore, the dynamic audit fair queueing (DAFQ) scheme is proposed in this paper which is capable of supporting robust fairness of bandwidth sharing. The main idea of the DAFQ is to detect the malicious flows and then adequate control policies are applied to restrain those ones. Furthermore, a simple probabilistic model is adopted to determine the detection period that is not only simple but effective to capture the randomly generated malicious flows. Computer simulation compares the fairness of the DAFQ with that of some well-known mechanisms. The simulation results show that the DAFQ is suitable to be deployed in the high-speed core routers due to its simplicity. Besides, the DAFQ is able to support robust fairness of bandwidth sharing more than the other compared mechanisms under various traffic situations.

关键词： Electronic mail Electrical capacitance tomography Bandwidth scheduling algorithm Traffic control

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Abstracting Modern FCCMs To Provide a Single Interface to Architectural Resources

Abstracting Modern FCCMs To Provide a Single Interface to Ar...

引用

Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Graham Schelle Dirk Grunwald Department of Computer Science University of Colorado Boulder Boulder CO USA

Mainstream processor architectures and field programmable custom computing machines (FCCMs) are colliding towards a heterogeneous system on chip architecture. This is apparent from Intel and AMD efforts to create new chip architectures with various processing cores focusing on DSP, networking, and graphics. From the embedded processor research, system-on-chips connected by network on chips have allowed scalable architectures with a variety of processing cores connected by an onchip network. In this paper we examine several scheduling and allocation policies that can be utilized across network on chip architectures regardless of the processing cores onchip. By abstracting characteristics of the processing cores with various scheduling data structures, any heterogeneous system on a chip can be allocated and scheduled dynamically.

关键词： Network-on-a-chip Processor scheduling System-on-a-chip Tiles Computer architecture Data structures Process design Field programmable gate arrays Cryptography scheduling algorithm

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Communicating via Fireflies: Geographic Routing on Duty-Cycled Sensors

Communicating via Fireflies: Geographic Routing on Duty-Cycl...

引用

International Symposium on Information Processing in Sensor Networks (IPSN)

作者： Suman Nath Phillip B. Gibbons Microsoft Research Limited UK Intel Research Pittsburgh USA

Geographic routing is a useful and scalable point-to-point communication primitive for wireless sensor networks. However, previous work on geographic routing makes the unrealistic assumption that all the nodes in the network are awake during routing. This overlooks the common deployment scenario where sensor nodes are duty-cycled to save energy. In this paper we investigate several important aspects of geographic routing over duty-cycled nodes. First, we extend existing geographic routing algorithms to handle the highly dynamic networks resulting from duty-cycling. Second, we provide the first formal analysis of the performance of geographic routing on duty-cycled nodes. Third, we use this analysis to develop an efficient decentralized sleep scheduling algorithm for reducing the number of awake nodes while maintaining both network coverage and a (tunable) target routing latency. Finally, we evaluate via simulation the performance of our approach versus running existing geographic routing algorithms on sensors duty-cycled according to previous sleep scheduling algorithms. Our results show, perhaps surprisingly, that a network of duty-cycled nodes can have slightly better routing performance than a static network that uses comparable energy. Our results further show that, compared to previous algorithms, our sleep scheduling algorithm significantly improves routing latency and network lifetime.

关键词： Routing scheduling algorithm Delay Wireless sensor networks algorithm design and analysis Sleep Performance analysis Wireless communication Real time systems Embedded system

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A Near-optimal Solution for the Heterogeneous Multi-processor Single-level Voltage Setup Problem

A Near-optimal Solution for the Heterogeneous Multi-processo...

引用

International Symposium on Parallel and Distributed Processing (IPDPS)

作者： Tai-Yi Huang Yu-Che Tsai Edward T.-H. Chu Department of Computer Science National Tsing Hua University Hsinchu Taiwan

A heterogeneous multi-processor (HeMP) system consists of several heterogeneous processors, each of which is specially designed to deliver the best energy-saving performance for a particular category of applications. A low-power real-time scheduling algorithm is required to schedule tasks on such a system to minimize its energy consumption and complete all tasks by their deadline. The problem of determining the optimal speed for each processor to minimize the total energy consumption is called the voltage setup problem. This paper provides a near-optimal solution for the HeMP single-level voltage setup problem. To our best knowledge, we are the first work that addresses this problem. Initially, each task is assigned to a processor in a local-optimal manner. We next propose a couple of solutions to reduce energy by migrating tasks between processors. Finally, we determine each processor's speed by its final workload and the deadline. We conducted a series of simulations to evaluate our algorithms. The results show that the local-optimal partition leads to a considerably better energy-saving schedule than a commonly-used homogeneous multi-processor scheduling algorithm. Furthermore, at all measurable configurations, our energy consumption is at most 3% more than the optimal value obtained by an exhaustive iteration of all possible task-to-processor assignments. In summary, our work is shown to provide a near-optimal solution at its polynomial-time complexity.

关键词： Voltage Energy consumption Processor scheduling scheduling algorithm Partitioning algorithms Signal processing algorithms Real time systems Energy measurement Polynomials Computer science

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Distance-Dependent RED Policy (DDRED)

Distance-Dependent RED Policy (DDRED)

引用

International Conference on Networking (ICN)

作者： Sebastien Linck Eugen Dedu Francois Spies Laboratoire D''InFormatique de l''Université de Franche-Comté Montbeliard France

The network quality of service (QoS) and the congestion control of the transport protocol are important parameters for the performance of a network data transfer. To this end, routers use various queue policies for packet dispatching, and all of them must deal with packet drop. We propose a new algorithm for packet drop in routers. Given that a packet drop wastes all the network resources it has already used, we propose a new policy which favors packets with higher distance from source. It can be simply integrated on top of tail drop or RED (with or without ECN) queue policies. Simulations with NS2 show that long flows are indeed favored compared to short flows, and lead to higher overall resource utilisation without sacrificing TCP fairness.

关键词： Traffic control Quality of service Tail Resource management Telecommunication traffic Transport protocols Dispatching Streaming media scheduling algorithm Round robin

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Efficient, Fully Local algorithms for CIOQ Switches

Efficient, Fully Local Algorithms for CIOQ Switches

引用

IEEE Annual Joint Conference: INFOCOM, IEEE Computer and Communications Societies

作者： A. Firoozshahian V. Manshadi A. Goel B. Prabhakar University of Stanford USA

A number of algorithms have been proposed in the literature for scheduling CIOQ switches. The algorithms which have been proven to provide strict performance guarantees on delay (via the emulation of an output-queued switch) have been too complicated to implement because they require the exchange of a large amount of information between inputs and outputs. With implementation as our primary focus, we consider scheduling algorithms that are "fully local." This means inputs and outputs must be able to make decisions regarding matchings using only local information (except requests, grants and accepts). This constraint, which is essentially necessary for high-speed implementations, appears too restrictive for designing algorithms which enable the emulation of an output-queued switch. Rather surprisingly, we find a very simple and fully local algorithm FLGS (for fully local Gale-Shapley) which, at a speedup of 2, emulates an output-queued switch implementing a number of different output link scheduling algorithms such as weighted round robin and strict priority. We explore the performance of the algorithm at speedups between 1 and 2 using simulations and find that it partitions the bandwidth nearly as well as an output-queued switch at speedups 1.2 or higher.

关键词： Switches scheduling algorithm Emulation Delay Round robin Throughput Bandwidth Fabrics Communication switching algorithm design and analysis

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Reducing Hybrid Disk Write Latency with Flash-Backed I/O Requests

Reducing Hybrid Disk Write Latency with Flash-Backed I/O Req...

引用

International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)

作者： T. Bisson S. A. Brandt University of California Santa Cruz CA USA

One of the biggest bottlenecks in desktop-based computing is the hard disk with I/O write latency being a key contributor. I/O write latency stems from the mechanical nature of hard disks, with seek and rotational delays the major components. Hybrid disk drives place a small amount of flash memory (NVCache) on the drive itself which can be leveraged by the host and has the potential to increase I/O performance and reduce hard disk power consumption. We present an I/O scheduling algorithm, "Flash-Backed I/O Requests", which leverages the on-board flash to reduce write latency. Since flash memory and rotating media have different I/O characteristics, predominantly in random access context, an I/O scheduler can decide which media will most efficiently service I/O requests. Our results show that with Flash-Backed I/O requests, overall write latency can be reduced by up to 70%.

关键词： Delay Hard disks Disk drives Flash memory scheduling algorithm File systems Energy consumption Random media Operating systems Context-aware services

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A QoS Architecture for IDMA-Based Multi-Service Wireless Networks

A QoS Architecture for IDMA-Based Multi-Service Wireless Net...

引用

IEEE International Conference on Communications (ICC)

作者： Q. Huang S. Chan K.-T. Ko L. Ping P. Wang Department of Electronic Engineering City University of Hong Kong Kowloon Hong Kong China

The recent investigations on interleave-division multiple-access (IDMA) have demonstrated its advantage in supporting high-data-rate and multi-rate services over wireless fading channels. This paper focuses on quality of service (QoS) guarantee in IDMA-based multi-service wireless networks. We propose a QoS architecture which addresses the key issues of QoS guarantee for multi-service in IDMA, including medium access control (MAC), admission control, power control, and rate allocation. The proposed IDMA QoS architecture avoids complex packet scheduling at the MAC layer which is however required in other existing multiple access systems. Data packets can be transmitted in IDMA without scheduling delay. Additionally, to improve the efficiency of random access, an interleave- division slotted-ALOHA (IDSA) access method is proposed for the IDMA MAC protocol. We derive the relationship between the arrival rate of access requests and the number of access interleavers allocated to an IDMA system for a given access success probability. Based on this relationship, we can adaptively adjust the number of access interleavers according to the traffic load of access requests, so as to ensure a satisfactory probability of successful access as well as low complexity of request detection at the receiver.

关键词： Wireless networks Quality of service Media Access Protocol Fading Admission control Power control scheduling algorithm Delay Access protocols Telecommunication traffic

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An Efficient Policy-based Packet Scheduler With Flow Cache

An Efficient Policy-based Packet Scheduler With Flow Cache

引用

IEEE Workshop on High Performance Switching and Routing

作者： Gao-feng Lv Xiao-ming Zhang School of Computer National University of Defense Technology Changsha Hunan China

To meet the requirements of parallelism, flexibility and extensibility, the multi-Processor Elements (PEs) architecture is widely applied in modern Network Processors (NPs) to support high-speed links of 10 Gbps. Multi-PEs are often organized in parallel to achieve efficient packet forwarding. It's a challenge to schedule the incoming packets from high-speed links to be processed by multiple PEs in parallel. In this paper, we propose Policy-based Packet Scheduler employing Flow Cache for 10Gbps NPs. For TCP flows, PPS-FC employs a flow cache, records the mapping relationship between TCP flow bundles and PEs and rates of flow bundles and utilizes the characteristic of flow timeout to design the scheme of cache management Meanwhile, according to the load-balancing indicator σ(τ) the scheduler shifts the high-rate flow bundles of the heavy-loaded PE to the light-loaded PE to preserve load balancing. The effectiveness of the scheduler with the well-chosen design parameters is evaluated by simulation with extrapolated workloads.

关键词： scheduling algorithm Load management Processor scheduling Protocols Delay effects Intelligent networks Parallel processing Internet Propagation delay Pipeline processing

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iPIFO: A Network Memory Architecture for QoS Routers

iPIFO: A Network Memory Architecture for QoS Routers

引用

IEEE Workshop on High Performance Switching and Routing

作者： Feng Wang Mounir Hamdi Department of Computer Science and Engineering Hong Kong University of Science and Technology Hong Kong China

Routers need memories to store and forward packets. More than that, routers use memories to schedule flows according to their quality-of-service (QoS) requirements. The simple first-in-first-out (FIFO) queue memory is insufficient to provide QoS guarantees. Most current routers are based on the virtual-output-queue (VOQ) memory management and use heuristic algorithms, such as iSLIP or DRRM, to schedule packets. On the other hand, push-in-first-out (PIFO) queue memory has also been proposed as a model for routers to meet the QoS requirements. The PIFO queue does not need a scheduler since packets are always first-out from the queue head. However, due to the sorting-related problems of the push-in operation, it is normally supposed impractical to build the PIFO queues in real hardware. We try to touch this problem in this paper and propose an indexed PIFO queue (iPIFO) architecture and a memory management algorithm on it We believe it is a feasible solution to bring the PIFO queue to practice.

关键词： Memory architecture scheduling algorithm Quality of service Memory management Hardware Packet switching Delay Queueing analysis Sorting Computer science

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