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检索条件"主题词=Scheduling algorithm"

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Harmonic scheduling: A Technique for scheduling beyond Loop-Carried Dependencies

Harmonic Scheduling: A Technique for Scheduling beyond Loop-...

引用

International Conference on VLSI Design

作者： Haigeng Wang N. Dutt A. Nicolau Department of Information and Computer Science University of California Irvine Irvine CA USA

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Power analysis and low-power scheduling techniques for embedded DSP software

Power analysis and low-power scheduling techniques for embed...

引用

International Symposium on System Synthesis

作者： M.T.-C. Lee V. Tiwari S. Malik M. Fujita Fujitsu Laboratories of America Inc. San Jose CA USA Department of Electrical Engineering Princeton University Princeton NJ USA

This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been developed using this technique. Significant points of difference have been observed between this model and the ones developed earlier for some general-purpose commercial microprocessors. In particular, the effect of circuit state on the power cost of an instruction stream is more marked in the case of this DSP processor. In addition, the DSP processor has a special architectural feature that allows instructions to be packed into pairs. The energy reduction possible through the use of this feature is studied. The on-chip Booth multiplier on the processor is a major source of energy consumption for DSP programs. A micro-architectural power model for the multiplier is developed and analyzed for further energy minimization. A scheduling algorithm incorporating these new techniques is proposed to reduce the energy consumed by DSP software. Energy reductions varying from 11% to 56% have been observed for several example programs. These energy savings are real and have been verified through physical measurement.

关键词： Digital signal processing Processor scheduling Power measurement Microprocessors Circuits Costs Energy consumption Minimization scheduling algorithm Energy measurement

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A general methodology for designing efficient traffic scheduling and shaping algorithms

A general methodology for designing efficient traffic schedu...

引用

IEEE Annual Joint Conference: INFOCOM, IEEE Computer and Communications Societies

作者： D. Stiliadis A. Varma Lucent Technol. AT&T Bell Labs. Holmdel NJ USA Computer Engineering Department University of California Santa Cruz CA USA

We introduce a general methodology for designing integrated shaping and scheduling algorithms for packet networks that provide fairness, low end-to-end delay, and low burstiness. The methodology is based on integrating a shaping mechanism with a scheduler from the class of rate-proportional servers (RPS) defined by Stiliadis and Varma (see Proceedings of ACM SIGMETRICS '96, p.104-15, 1996). The resulting algorithms provide an end-to-end delay bound identical to that of weighted fair queueing. Their worst-case fairness, in terms of minimizing the worst-case delay to empty the session backlog, is much superior to that of weighted fair queueing, and equal to the best known for any scheduling algorithm. In addition, the algorithms achieve a level of fairness in the distribution of free bandwidth among competing sessions better than that of weighted fair queueing. We show that, under this framework, even an unfair scheduling algorithm belonging to the RPS class, such as VirtualClock, can yield worst-case fairness identical to that obtained with weighted fair queueing. We also develop an integrated shaper-scheduler that provides optimal output burstiness and is attractive for use in both network adapters and in switches that support traffic re-shaping. We describe an efficient implementation of this integrated shaping and scheduling algorithm with log/sub 2/(V) complexity, where V is the number of sessions sharing the outgoing link.

关键词： Design methodology algorithm design and analysis scheduling algorithm Traffic control Delay Switches Bandwidth Telecommunication traffic Communication system traffic control Packet switching

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Opportunistic packet scheduling and Media Access control for wireless LANs and multi-hop ad hoc networks

Opportunistic packet Scheduling and Media Access control for...

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IEEE Conference on Wireless Communications and Networking

作者： Jianfeng Wang Hongqiang Zhai Yuguang Fang Department of Electrical & Computer Engineering University of Florida Gainesville FL USA

ISBN: (纸本)0780383443

In the wireless LANs or mobile ad hoc networks, a node with multi-packets in its queue waiting for delivery to several neighboring nodes may choose to schedule a candidate receiver with good channel condition for transmission. By choosing a receiver with good channel condition, the Head-of-Line (HOL) blocking problem can be alleviated and the overall system throughput can be increased. Motivated by this observation, we introduce the Opportunistic packet scheduling and Media Access control (OSMA) protocol to exploit high quality channel condition under certain fairness constraints. We base our design on CSMA/CA so that it can be simply incorporated into the 802.11 standard. The key mechanisms of OSMA protocol are multicast RTS and priority-based CTS. In the OSMA protocol, RTS includes a list of candidate receivers. Among those who are qualified to receive data, the one with the highest order would be granted to catch the channel by replying CTS in the first place. The ordering list is updated dynamically according to certain scheduling policy such as Round Robin (RR) and Earlier timestamp First (ETF), and also other performance metrics, ex., fairness and timeliness, can be enhanced. To the best of our knowledge, this is the first paper to exploit the multiuser diversity in the CSMA/CA based wireless networks. We evaluate the OSMA using ns-2 and our simulation results show that this protocol can improve the network throughput significantly.

关键词： scheduling algorithm Media Access Protocol Wireless LAN Spread spectrum communication Ad hoc networks Throughput Multiaccess communication Multicast protocols Access protocols Mobile ad hoc networks

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Optimal scheduling of finite-state machines

Optimal scheduling of finite-state machines

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IEEE International Conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： T.-Y. Yen W. Wolf Department of Electrical Engineering Princeton University Princeton NJ USA

The paper describes an algorithm for solving scheduling problems which contain multiple, interlocking cycles, such as scheduling constraints in state transition graphs. This algorithm is based on previous work on toroidal compaction but introduces three significant improvements: it allows the designer to use upper bound or equality constraints; it does not require an initial feasible solution; and it can handle multiple loops and conditional branches in the constraint system. Experimental results demonstrate the algorithm's effectiveness.< >

关键词： Optimal scheduling Compaction scheduling algorithm Timing Clocks Wrapping algorithm design and analysis Upper bound High level synthesis Control systems

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Efficient scheduling of Task Graphs to Multiprocessors Using a Combination of Modified Simulated Annealing and List Based scheduling

Efficient Scheduling of Task Graphs to Multiprocessors Using...

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International Symposium on Intelligent Information Technology and Security Informatics, IITSI

作者： Mahboobeh Houshmand Elaheh Soleymanpour Hossein Salami Mahya Amerian Hossein Deldari Department of computer engineering Ferdowsi University of Mashhad Mashhad Iran Department of computer engineering Mazandaran University Babol Iran

ISBN: (纸本)9781424467303;9780769540207

Multiprocessor task scheduling is a well known NP-hard problem and numerous methods have been proposed to optimally solve it. The objective is makespan minimization, i.e. we want the last task to complete as early as possible. Simulated Annealing (SA) has been considered a very good tool for complex nonlinear optimization problem, such as multiprocessor task scheduling. However, a major disadvantage of the technique is that it is extremely slow. List-based scheduling algorithms are regarded as having acceptable results. In this paper we use a list scheduling based algorithm to find an initial solution and in the neighborhood generation phase of simulated annealing. We also parameterize SA and use a modified version of it. Simulation results show that our approach significantly improves the initial solution in considerably low time for different number of tasks; i.e. it efficiently outperforms the used list based scheduling approach.

关键词： Simulated annealing Processor scheduling Computational modeling scheduling algorithm Genetic mutations Cooling Costs Computer simulation NP-hard problem Multiprocessing systems

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Partitioning and scheduling of asynchronous pipelines

Partitioning and scheduling of asynchronous pipelines

引用

CompEuro

作者： Yau-Hwang Kuo Shaw-Pyng Lo Institute of Information Engineering National Cheng Kung University Tainan Taiwan

The authors propose algorithms for partitioning and scheduling of asynchronous pipelines. Resource sharing is taken into account. The focus is on the automated data path synthesis of asynchronous pipelines. A heuristic algorithm based on a probabilistic approach is described for partitioning the circuit description into pipelined stages. Some mathematical formulas and a clique partitioning approach are proposed to determine resource sharable stages. A simulated evolution algorithm is outlined for scheduling operations into stages. Experiments and simulations have confirmed the efficiency of the algorithms.< >

关键词： Pipelines Clocks Circuit synthesis Partitioning algorithms Integrated circuit interconnections Delay scheduling algorithm Circuit simulation Resource management Latches

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Performance of opportunistic scheduling schemes for MIMO-OFDM wireless LANs

Performance of opportunistic scheduling schemes for MIMO-OFD...

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Conference on Local Computer Networks (LCN)

作者： Mikael Gidlund Per Ahag Nera Networks AS Bergen Norway Department of Mathematics and Mathematical Statistics Umea University Sweden

In this paper, we propose and investigate scheduling algorithms for multiple-input multiple-output (MIMO) wireless local area networks (WLANs) based on orthogonal frequency division multiplexing (OFDM). We propose two new scheduling approaches which combines the channel states with queue states. The obtained results show that the proposed schemes outperform well known schemes such as proportional fair (PF) and shortest remaining processing time (SRPT) in terms of throughput and fairness.

关键词： Throughput Wireless LAN OFDM scheduling algorithm Receiving antennas MIMO scheduling

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Mitigating Signaling Requirements For MIMO with Frequency Domain Packet scheduling

Mitigating Signaling Requirements For MIMO with Frequency Do...

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IEEE 65th Vehicular Technology Conference (VTC-Spring 2007), vol.6

作者： Na Wei Akhilesh Pokhariyal Troels B. Sorensen Troels E. Kolding Preben E. Mogensen Department of Electronic Systems Aalborg University Denmark Nokia Networks Denmark

MIMO techniques in the spatial division multiplexing (SDM) mode have demonstrated tremendous performance potential when a single user link is considered. Recent studies have shown that frequency domain packet scheduling (FDPS) can provide a significant gain when combined with SDM (SDM-FDPS) by exploiting the multi-user diversity gain over frequency as well as the spatial domains. However, the increased signaling requirements in both uplink and downlink may prevent its practical use. In this paper several effective approaches are identified for reducing the signaling requirements for SDM-FDPS while still maintaining acceptable performance. Results show that the performance loss can be kept within 10% for a uplink signaling reduction of 88% and a downlink signaling reduction of 30%.

关键词： MIMO Frequency domain analysis scheduling algorithm Downlink Resource management Throughput Frequency estimation Diversity methods Frequency diversity Signal processing

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Data cache architecture of the superscalar by scheduling patterns

Data cache architecture of the superscalar by scheduling pat...

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Annual Hawaii International Conference on System Sciences (HICSS)

作者： T. Kato T. Ono N. Bagherzadeh Department of Electrical and Computer Engineering University of California Irvine CA USA

A novel data cache architecture for the out-of-order issue superscalar processor architecture is presented. The superscalar method is based on the scheduling patterns that describe predetermined out-of-order execution for four instructions stored in a programmable logic array. To exploit instruction-level parallelism, the authors propose an effective memory address conflict avoidance scheme for the data cache. The approach is to resolve alias resolution by hardware to maintain object code compatibility and also augment instruction-level parallelism. The performance of the proposed architecture on selected benchmark programs was simulated.< >

关键词： Hazards Hardware Processor scheduling Out of order Decoding Computer architecture Parallel processing Programmable logic arrays scheduling algorithm Inspection

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