An efficient scheduling algorithm for a CPU has always been on the lookout by researchers and engineers since the invention of computers. Today most of the tasks are running online facilitated by servers. So, the requ...
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The current conventional adaptive sensor network resource multi-path optimization scheduling algorithm is mainly constructed by calculating the scheduling parameters and the multi-objective scheduling function, which ...
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Cloud computing is becoming a trending and important technology that everyone is using globally on a large scale. It allows users to get access to resources (Storage and computational) online over the internet. With t...
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In order to better meet the requirements of heavy uplink and low latency in 5G advanced systems, Subband Full Duplex (SBFD) has been put forward and considered as one of the hot issues in 3GPP Release 18. Compared wit...
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This article studies small to medium-sized monolithic switches for FPGA implementation and presents a novel switch design that achieves high algorithmic performance and FPGA implementation efficiency. Crossbar switche...
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This article studies small to medium-sized monolithic switches for FPGA implementation and presents a novel switch design that achieves high algorithmic performance and FPGA implementation efficiency. Crossbar switches based on virtual output queues (VOQs) and variations have been rather popular for implementing switches on FPGAs, with applications in network switches, memory interconnects, network-on-chip (NoC) routers etc. The implementation efficiency of crossbar-based switches is well-documented on ASICs, though we show that their disadvantages can outweigh their advantages on FPGAs. One of the most important challenges in such input-queued switches is the requirement for iterative scheduling algorithms. In contrast to ASICs, this is more harmful on FPGAs, as the reduced operating frequency and narrower packets cannot "hide" multiple iterations of scheduling that are required to achieve a modest scheduling performance. Our proposed design uses an output-queued switch internally for simplifying scheduling, and a queue balancing technique to avoid queue fragmentation and reduce the need for memory-sharing VOQs. Its implementation approaches the scheduling performance of a state-of-the-art FPGA-based switch, while requiring considerably fewer resources.
Real-time and certainty are important performance indicators of substation network data transmission. There are many time-sensitive data in the substation site, and the transmission of these data has very high real-ti...
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Deadline and cost optimization are the important issues in cloud computing environment. Lack of these two factors discourages the cloud users from using the services of clouds. The proposed task scheduling considers f...
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作者:
Wu, QiaoliGao, BoXiong, KeBeijing Jiaotong University
Engineering Research Center of Network Management Technology for High-Speed Railway Ministry of Education School of Computer and Information Technology Beijing China
In the upcoming 6G era, various end devices with data and computing resources can collaborate through federated learning (FL) to achieve the goal of ubiquitous intelligence. Inside any of those 'X' (i.e. every...
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To leverage the explosively growing computing capacity of satellites, this paper envisions a novel computing paradigm – on-satellite data analysis. By directly dispatching data analysis logic to satellites and execut...
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The scheduling of large-scale service requests and jobs usually requires the service cluster to fully use node computing resources. However, due to the increasing number of server devices, the dependence between resou...
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