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37th ACM-SIGPLAN-SIGACT Symposium on Principles of Programming Languages

作者： Myreen, Magnus O. Univ Cambridge Comp Lab Cambridge CB2 1TN England

ISBN: (纸本)9781605584799

This paper presents a method for creating formally correct just-in-time (JIT) compilers. The tractability of our approach is demonstrated through, what we believe is the first, verification of a JIT compiler with respect to a realistic semantics of self-modifying x86 machine code. Our semantics includes a model of the instruction cache. Two versions of the verified JIT compiler are presented: one generates all of the machine code at once, the other one is incremental i.e. produces code on-demand. All proofs have been performed inside the HOL4 theorem prover.

关键词： Performance Reliability Verification Compiler verification just in time self-modifying code

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Hybrid Analysis and Control of Malware

Hybrid Analysis and Control of Malware

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13th International Symposium on Recent Advances in Intrusion Detection Systems

作者： Roundy, Kevin A. Miller, Barton P. Univ Wisconsin Dept Comp Sci Madison WI 53706 USA

ISBN: (纸本)9783642155116

Malware attacks necessitate extensive forensic analysis efforts that are manual-labor intensive because of the analysis-resistance techniques that malware authors employ. The most prevalent of these techniques are code unpacking, code overwriting, and control transfer obfuscations. We simplify the analyst's task by analyzing the code prior to its execution and by providing the ability to selectively monitor its execution. We achieve pre-execution analysis by combining static and dynamic techniques to construct control- and data-flow analyses. These analyses form the interface by which the analyst instruments the code. This interface simplifies the instrumentation task, allowing us to reduce the number of instrumented program locations by a hundred-fold relative to existing instrumentation-based methods of identifying unpacked code. We implement our techniques in SD-Dyninst and apply them to a large corpus of malware, performing analysis tasks such as code coverage tests and call-stack traversals that are greatly simplified by hybrid analysis.

关键词： malware analysis forensics hybrid de-obfuscation packed code self-modifying code obfuscated code

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Protection of DRM Agent codes

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10th Pacific Rim Conference on Multimedia

作者： Liang, Shan Emmanuel, Sabu Nanyang Technol Univ Sch Comp Engn Singapore Singapore

ISBN: (纸本)9783642104664

In most existing digital rights management (DRM) technologies, the DRM agent, or DRM client, contains the content protection mechanisms applied to the system However, the DRM agent that runs at the consumer side is often exposed to reverse engineering to compromise DRM agent on to obtain the sect et, license information kept at the DRM agent In this paper, we propose an algorithm to protect against the reverse engineering of DRM agent codes and thus to protect, the inside workings of the DRM agents Our algorithm is based on self-modifying code and control flow flatten techniques And after applying our algorithm, the agent software becomes hard to be analyzed by the attacker which can be Seen from the experimental results

关键词： DRM Agent codes Obfuscation self-modifying code

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A computability perspective on self-modifying programs

A computability perspective on self-modifying programs

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7th IEEE International Conference on Software Engineering and Formal Methods (SEFM 2009)

作者： Bonfante, Guillaume Marion, Jean-Yves Reynaud-Plantey, Daniel Nancy Univ LORIA F-54602 Villers Les Nancy France

ISBN: (纸本)9780769538709

In order to increase their stealth, malware commonly use the self-modification property of programs. By doing so, programs can hide their real code so that it is difficult to define a signature for it. But then, what is the meaning of those programs: the obfuscated form, or the hidden one? Furthermore, from a computability perspective, it becomes hard to speak about the program since, its own code varies over time. To cope with these issues, we provide an operational semantics for self-modifying programs and we show that they can be constructively rewritten to a non-modifying program.

关键词： self-modifying code semantics computability virus obfuscation

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Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors

Exploiting access semantics and program behavior to reduce s...

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13th International Conference on Architectural Support for Programming Languages and Operating Systems

作者： Ballapuram, Chinnakrishnan S. Sharif, Ahmad Lee, Hsien-Hsin S. Intel Corp FDC Architecture Santa Clara CA 95051 USA Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA

ISBN: (纸本)9781595939586

Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as the baseline to analyze problems in various domains. One of the main design issues facing CMP systems is the growing number of snoops required to maintain cache coherency and to support self/cross-modifying code that leads to power and performance limitations. In this paper, we analyze the internal and external snoop behavior in a CMP system and relax the snoopy cache coherence protocol based on the program semantics and properties of the shared variables for saving power. Based on the observations and analyses, we propose two novel techniques: Selective Snoop Probe (SSP) and Essential Snoop Probe (ESP) to reduce power without compromising performance. Our simulation results show that using the SSP technique, 5% to 65% data cache energy savings per core for different processor configurations can be achieved with 1% to 2% performance improvement. We also show that 5% to 82% of data cache energy per core is spent on the non-essential snoop probes that can be saved using the ESP technique.

关键词： design experiment power performance chip multiprocessors internal and external snoops self-modifying code MESI protocol

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Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors

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ACM SIGPLAN NOTICES 2008年第3期43卷 60-69页

作者： Ballapuram, Chinnakrishnan S. Sharif, Ahmad Lee, Hsien-Hsin S. Intel Corp FDC Architecture Santa Clara CA 95051 USA Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA

关键词： design experiment power performance chip multiprocessors internal and external snoops self-modifying code MESI protocol

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self-Replicating and self-modifying Programs in Fraglets

Self-Replicating and Self-Modifying Programs in Fraglets

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2nd International Conference on Bio-Inspired Models of Network, Information and Computing Systems

作者： Yamamoto, Lidia Schreckling, Daniel Meyer, Thomas Univ Basel Dept Comp Sci Bernoullistr 16 CH-4056 Basel Switzerland Univ Hamburg Dept Comp Sci D-22527 Hamburg Germany

ISBN: (纸本)9781424436491

The inherently decentralized nature of artificial chemical computing models makes them particularly attractive for building bio-inspired software with self-organizing and emergent properties. Yet it is not straightforward to construct such chemical programs, either manually or automatically. We are exploring the potential of chemical programming models for automatic programming, in the context of autonomic environments where software must operate unsupervised for unlimited periods of time. We are enhancing the Fraglets chemical language to support intrinsic genetic programming, such that programs can replicate and modify themselves during execution. The Fraglets language was originally designed to express communication protocols. We first show a few extensions towards more generic computations, then show how self-replicating and self-modifying programs can be created. This is a first step towards programs that can repair and optimize themselves in an autonomic way. We reveal a number of features and shortcomings of the language, suggesting fixes and future directions.

关键词： Artificial Chemical Computing self-modifying code self-Replication Quines

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The transmeta code Morphing™ Software:: Using speculation, recovery, and adaptive retranslation to address real-life challenges

The transmeta Code Morphing™ Software:: Using speculation, ...

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International Symposium on code Generation and Optimization

作者： Dehnert, JC Grant, BK Banning, JP Johnson, R Kistler, T Klaiber, A Mattson, J Trasmeta Corp Santa Clara CA 95054 USA

ISBN: (纸本)076951913X

Transmeta's Crusoe microprocessor is a full, system-level implementation of the x86 architecture, comprising a native VLIW microprocessor with a software layer, the code Morphing Software (CMS), that combines an interpreter, dynamic binary translator, optimizer, and run-time system. In its general structure, CMS resembles other binary translation systems described in the literature, but it is unique in several respects. The wide range of PC workloads that CMS must handle gracefully in real-life operation, plus the need for full system-level x86 compatibility, expose several issues that have received little or no attention in previous literature, such as exceptions and interrupts, I/O, DAM, and self-modifying code. In this paper we discuss some of the challenges raised by these issues, and present the techniques developed in Crusoe and CMS to meet those challenges. The key to these solutions is the Crusoe paradigm of aggressive speculation, recovery to a consistent x86 state using unique hardware commit-and-rollback support, and adaptive retranslation when exceptions occur too often to be handled efficiently by interpretation.

关键词： binary translation dynamic translation dynamic,optimization emulation speculation self-modifying code

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AN ARCHITECTURAL FRAMEWORK FOR SUPPORTING HETEROGENEOUS INSTRUCTION-SET ARCHITECTURES

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COMPUTER 1993年第6期26卷 39-56页

作者： SILBERMAN, GM EBCIOGLU, K IBM Thomas J. Watson Res. Center Yorktown Heights NY

An architectural framework that allows software applications and operating system code written for a given instruction set to migrate to different, higher performance architectures is described. The framework provides a hardware mechanism that enhances application performance while keeping the same program behavior from a user perspective. The framework is designed to accommodate program exceptions, self-modifying code, tracing, and debugging. Examples are given for IBM System/390 operating-system code and AIX utilities, showing the performance potential of the scheme using a very long instruction word (VLIW) machine as the high-performance target architecture

关键词： AIX utilities IBM System/390 operating-system code VLIW application performance architectural framework debugging hardware mechanism heterogeneous instruction-set architectures higher performance architectures instruction sets open systems operating system code operating systems (computers) program behavior program exceptions program interpreters self-modifying code software applications software portability tracing user perspective very long instruction word

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CACHE BEHAVIOR OF COMBINATOR GRAPH REDUCTION

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ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS 1992年第2期14卷 265-297页

作者： KOOPMAN, PJ LEE, P SIEWIOREK, DP CARNEGIE MELLON UNIV SCH COMP SCIPITTSBURGHPA 15213

The results of cache-simulation experiments with an abstract machine for reducing combinator graphs are presented. The abstract machine, called TIGRE, exhibits reduction rates that, for similar kinds of combinator graphs on similar kinds of hardware, compare favorably with previously reported techniques. Furthermore, TIGRE maps easily and efficiently onto standard computer architectures, particularly those that allow a restricted form of self-modifying code. This provides some indication that the conventional "stored program" organization of computer systems is not necessarily an inappropriate one for functional programming language implementations. This is not to say, however, that present day computer systems are well equipped to reduce combinator graphs. In particular, the behavior of the cache memory has a significant effect on performance. In order to study and quantify this effect, trace-driven cache simulations of a TIGRE graph reducer running on a reduced instruction-set computer are conducted. The results of these simulations are presented with the following hardware-cache parameters varied: cache size, block size, associativity, memory update policy, and write-allocation policy. To begin with, the cache organization of a commercially available system is used and then the performance sensitivity with respect to variations of each parameter are measured. From the results of the simulation study, a conclusion is made that combinator-graph reduction using TIGRE runs most efficiently when using a cache memory with an allocate-on-write-miss strategy, moderately large block size (preferably with subblock placement), and copy-back memory updates.

关键词： ABSTRACT MACHINE COMBINATORS GRAPH REDUCTION self-modifying code

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