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检索条件"主题词=Shift-and-add algorithm"
5 条 记 录,以下是1-10 订阅
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Radial Digital Breast Tomosynthesis Using a shift-and-add algorithm
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11th International Congress of the IUPESM/World Congress on Medical Physics and Biomedical Engineering
作者: Shimao, D. Ichihara, S. Sugiyama, H. Ando, M. Ibaraki Prefectural Univ Hlth Sci Dept Radiol Sci Ami Ibaraki 46692 Japan Nagoya Med Ctr Dept Pathol Nagoya Aichi Japan High Energy Accelerator Res Org Inst Mat Struct Sci Tsukuba Ibaraki Japan Tokyo Univ Sci Res Inst Sci & technol Noda Chiba Japan
With the advent of flat-panel detectors capable of high-speed data communication, conventional geometric tomography is once again attracting attention in the form of tomosynthesis. In this study, the use of radial tom... 详细信息
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SYSTOLIC MULTIPLIER
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ELECTRONICS LETTERS 1984年 第24期20卷 995-996页
作者: HOEKSTRA, J Department of Electrical Engineering Delft University of Technology Mekelweg 4 Delft 2600 GA Netherlands
A systolic multiplier based on the shift-and-add algorithm is presented. With this array the minimum possible number of cells is obtained.
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Optimal parameters for clinical implementation of breast cancer patient setup using Varian DTS software
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JOURNAL OF APPLIED CLINICAL MEDICAL PHYSICS 2012年 第3期13卷 60-73页
作者: Ng, Sook Kien Zygmanski, Piotr Jeung, Andrew Mostafavi, Hassan Hesser, Juergen Bellon, Jennifer R. Wong, Julia S. Lyatskaya, Yulia Brigham & Womens Hosp Dept Radiat Oncol Boston MA 02115 USA Harvard Univ Sch Med Dana Faber Canc Inst Boston MA 02115 USA Univ Heidelberg Mannheim Med Ctr Dept Radiat Oncol D-6800 Mannheim Germany Varian Med Syst Inc Palo Alto CA 94304 USA
Digital tomosynthesis (DTS) was evaluated as an alternative to cone-beam computed tomography (CBCT) for patient setup. DTS is preferable when there are constraints with setup time, gantry-couch clearance, and imaging ... 详细信息
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Efficient Low-Precision CORDIC algorithm for Hardware Implementation of Artificial Neural Network  23rd
Efficient Low-Precision CORDIC Algorithm for Hardware Implem...
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23rd International Symposium on VLSI Design and Test
作者: Raut, Gopal Bhartiy, Vishal Rajput, Gunjan Khan, Sajid Beohar, Ankur Vishvakarma, Santosh Kumar Indian Inst Technol Indore VLSI Circuit & Syst Design Lab Nanoscale Devices Discipline Elect Engn Indore 453552 Madhya Pradesh India
An efficient FPGA or ASIC based hardware implementation of deep neural networks face the challenge of limited chip area, and therefore an area efficient architecture is required to fully harness the capacity of parall... 详细信息
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AN ITERATIVE algorithm FOR LINEAR COMPUTED LAMINOGRAPHY BASED ON RECURSIVE DIFFERENCE
AN ITERATIVE ALGORITHM FOR LINEAR COMPUTED LAMINOGRAPHY BASE...
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第十六届国际体视学与图像分析学术会议
作者: Jing ZOU Pengxiang JI State Key Laboratory of Precision Measuring Technology and Instruments Tianjin University
Linear Computed Laminography(LCL) is often preferred in industrial inspection due to its high efficiency and low ***,the existing shift-and-add(SAA) algorithm introduces superimposed artifacts and blurring in the reco... 详细信息
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