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检索条件"主题词=Simplified AES Algorithm Resistant to Zero-Value Power Analysis and its VLSI Implementation"
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simplified aes algorithm resistant to zero-value power analysis and its vlsi implementation
Simplified AES Algorithm Resistant to Zero-Value Power Analy...
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2006 8th International Conference on Solid-State and Integrated Circuit Technology
作者: Jia Zhao Xiaoyang Zeng Jun Han Jun Chen State-Key Lab of ASIC and System Fudan University
This paper proposes a simplified aes algorithm resistant to zero-value DPA(Differential power analysis) attack and its vlsi *** paper makes some improvements to the additive masking aes algorithm to decrease its ***,s... 详细信息
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