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20th IEEE International Symposium on Real-Time Distributed Computing (ISORC)

作者： Cilku, Bekim Puffitsch, Wolfgang Prokesch, Daniel Schoeberl, Martin Puschner, Peter Vienna Univ Technol Vienna Austria Tech Univ Denmark Copenhagen Denmark

ISBN: (纸本)9781538615744

Deriving the Worst-Case Execution Time (WCET) of a task is a challenging process, especially for processor architectures that use caches, out-of-order pipelines, and speculative execution. Despite existing contributions to WCET analysis for these complex architectures, there are open problems. The single-path code generation overcomes these problems by generating time-predictable code that has a single execution trace. However, the simplicity of this approach comes at the cost of longer execution times. This paper addresses performance improvements for singlepath code. We propose a time-predictable memory hierarchy with a prefetcher that exploits the predictability of execution traces in single-path code to speed up code execution. The new memory hierarchy reduces both the cache-miss penalty time and the cachemiss rate on the instruction cache. The benefit of the approach is demonstrated through benchmarks that are executed on an FPGA implementation.

关键词： prefetching single-path code Time-predictable memory hierarchy

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Predictable and optimized single-path code for predicated processors

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JOURNAL OF SYSTEMS ARCHITECTURE 2024年 154卷

作者： Maroun, Emad Jacob Schoeberl, Martin Puschner, Peter TU Wien Inst Comp Engn Vienna Austria Tech Univ Denmark Dept Appl Math & Comp Sci Lyngby Denmark

single-path code is a code generation technique for real-time systems that reduces execution time variability. However, doing so can incur significant execution-time overhead and does not guarantee constant execution times. In this paper, we address the performance challenges of single-path code and solve the variability issue. We present the repetition dominance relation to identify and optimize code blocks that are always executed a fixed number of times. We show that single-path code's instructions are uniquely easy to schedule, and we explore an extension to the Patmos architecture that allows additional instruction types in the second issue slot. Lastly, we present two techniques for ensuring that functions always perform the same number of accesses to memory, resulting in programs with constant execution time. We compare the performance of single-path code to that of statically analyzed traditional code. Our results show that single-path code's performance is mostly competitive while outright superior in several cases. However, pathological cases of poor performance are still observed.

关键词： Real-time systems single-path code Optimization Constant execution time Instruction scheduling

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A Processor Extension for Time-Predictable code Execution 24

A Processor Extension for Time-Predictable Code Execution

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24th IEEE International Symposium on Real-Time Distributed Computing (ISORC)

作者： Platzer, Michael Puschner, Peter TU Wien Inst Comp Engn Vienna Austria

ISBN: (纸本)9781665404143

In this paper, we present an instruction filter, a simple architecture extension that adds support for fully predicated execution to existing processor cores that do not natively support it. This makes single-path code execution and hence high quality and easily derivable worst-case execution time (WCET) information available for a wide range of processors. We have implemented the single-path instruction filter for two processors and evaluated it on the TACLe benchmark collection. The results demonstrate that despite the seeming inefficiency of single-path code, our method does not substantially increase the WCET. Therefore, running single-path code on processors with our instruction filter represents a competitive method for time-predictable code execution.

关键词： real-time systems single-path code predictable timing

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A Time-Predictable Instruction-Cache Architecture that Uses Prefetching and Cache Locking 18

A Time-Predictable Instruction-Cache Architecture that Uses ...

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IEEE 18th International Symposium on Real-Time Distributed Computing Workshops

作者： Cilku, Bekim Prokesch, Daniel Puschner, Peter Vienna Univ Technol Inst Comp Engn A-1040 Vienna Austria

ISBN: (纸本)9781467377096

Trustable Worst-Case Execution-Time (WCET) bounds are a necessary component for the construction and verification of hard real-time computer systems. Deriving such bounds for contemporary hardware/software systems is a complex task. The single-path conversion overcomes this difficulty by transforming all unpredictable branch alternatives in the code to a sequential code structure with a single execution trace. However, the simpler code structure and analysis of single-path code comes at the cost of a longer execution time. In this paper we address the problem of the execution performance of single-path code. We present a new cache organization that utilizes the principle of locality of single-path code to reduce cache miss latency and cache miss rate. The proposed cache memory architecture combines cache prefetching and cache locking, so that the prefetcher capitalizes on spatial locality while the locker makes use of temporal locality. The demonstration section shows how these two techniques can complement each other.

关键词： cache predictability prefetching single-path code prefetching Cache memory codes spatial locality cache miss Locking

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