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A 22-nm All-Digital Time-Domain Neural Network Accelerator for Precision In-sensor Processing

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 2024年第12期32卷 2220-2231页

作者： Mohey, Ahmed M. Leslin, Jelin Singh, Gaurav Kosunen, Marko Ryynanen, Jussi Andraud, Martin Aalto Univ Dept Elect & Nanoengn Espoo 02150 Finland UCLouvain ICTEAM B-1348 Leuven Belgium

Deep neural network (DNN) accelerators are increasingly integrated into sensing applications, such as wearables and sensor networks, to provide advanced in-sensor processing capabilities. Given wearables' strict size and power requirements, minimizing the area and energy consumption of DNN accelerators is a critical concern. In that regard, computing DNN models in the time domain is a promising architecture, taking advantage of both technology scaling friendliness and efficiency. Yet, time-domain accelerators are typically not fully digital, limiting the full benefits of time-domain computation. In this work, we propose an all-digital time-domain accelerator with a small size and low energy consumption to target precision in-sensor processing like human activity recognition (HAR). The proposed accelerator features a simple and efficient architecture without dependencies on analog nonidealities such as leakage and charge errors. An eight-neuron layer (core computation layer) is implemented in 22-nm FD-SOI technology. The layer occupies 70x70 mu m while supporting multibit inputs (8-bit) and weights (8-bit) with signed accumulation up to 18 bits. The power dissipation of the computation layer is 576 mu W at 0.72-V supply and 500-MHz clock frequency achieving an average area efficiency of 24.74 GOPS/mm(2) (up to 544.22 GOPS/mm(2)), an average energy efficiency of 0.21 TOPS/W (up to 4.63 TOPS/W), and a normalized energy efficiency of 13.46 1b-TOPS/W (up to 296.30 1b-TOPS/W).

关键词： Human activity recognition Neurons Accuracy Time-domain analysis Computational modeling Artificial neural networks Computer architecture Wearable devices Energy efficiency sensors Edge computing human activity recognition (HAR) inertial measurement unit (IMU) in-sensor processing multiply-and-accumulate multiply and accumulate (MAC) neural network accelerator smart sensor interface time-domain signal processing

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Toward All-Digital Time-Domain Neural Network Accelerators for In-sensor Processing Applications 9

Toward All-Digital Time-Domain Neural Network Accelerators f...

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9th IEEE Nordic Circuits and Systems Conference (NorCAS)

作者： Mohey, Ahmed M. Kosunen, Marko Ryynanen, Jussi Andraud, Martin Aalto Univ Dept Elect & Nanoengn Espoo Finland

ISBN: (纸本)9798350337570

Deep Neural Network (DNN) accelerators are increasingly integrated into sensing applications, such as wearables and sensor networks, to provide advanced in-sensor processing capabilities. Given wearables' strict size and power requirements, minimizing the area and energy consumption of DNN accelerators is a critical concern. In that regard, computing DNN models in the time domain is a promising architecture, taking advantage of both technology scaling friendliness and efficiency. Yet, time-domain accelerators are typically not fully digital, limiting the full benefits of time-domain computation. In this work, we propose a time-domain multiply and accumulate (MAC) circuitry enabling an all-digital with a small size and low energy consumption to target in-sensor processing. The proposed MAC circuitry features a simple and efficient architecture without dependencies on analog non-idealities such as leakage and charge errors. It is implemented in 22nm FD-SOI technology, occupying 35 mu m x 35 mu m while supporting multi-bit inputs (8-bit) and weights (4-bit). The power dissipation is 46.61 mu W at 500MHz, and 20.58 mu W at 200MHz. Combining 32 MAC units achieves an average power efficiency, area efficiency and normalized efficiency of 0.45 TOPS/W and 75GOPS/mm(2), and 14.4 1b-TOPS/W.

关键词： Edge Computing Human Activity Recognition HAR Inertial Measurement Unit IMU In-sensor Processing Multiply-and-Accumulate MAC Neural Network Accelerator smart sensor interface Time-Domain Signal Processing

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Embedded Configurable sensor interface Devices for Seamless Data Acquisition

Embedded Configurable Sensor Interface Devices for Seamless ...

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21st Telecommunications Forum (TELFOR)

作者： Grunde, Uldis Inst Elect & Comp Sci LV-1006 Riga Latvia

ISBN: (纸本)9781479914203

The presented embedded configurable interface device is a feasible solution for interfacing different types of smart sensor systems and user devices. A microcontroller with dedicated I/O interface driver and a smart sensor communication driver is necessary in creating the seamless interface between end-user and smart sensors systems.

关键词： smart sensor interface user-device configurable interface micro-controller based interface device

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A Capacitance-Ratio-Modulated Current Front-End Circuit With Pulsewidth Modulation Output for a Capacitive sensor interface

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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT 2012年第2期61卷 447-455页

作者： Sheu, Meng-Lieh Hsu, Wei-Hung Tsao, Lin-Jie Natl Chi Nan Univ Dept Elect Engn Puli 54561 Taiwan

This paper presents a front-end circuit with pulsewidth modulation (PWM) output for a capacitive sensor interface. A single-MOSFET-based capacitance-ratio-modulated current (CRMC) circuit is proposed to transform the sensed capacitance into a current proportional to a capacitance ratio. The proposed single-MOSFET-based CRMC circuit not only saves a lot of chip area but also lowers power consumption. Then, a dual-slope integration circuit transforms further the modulated current into PWM output. A prototype chip is designed and fabricated with a 0.35-mu m complementary metal-oxide-semiconductor process and has a core area of 0.09 mm(2). The measurement results of the prototype chip demonstrate an accuracy value of up to 9.3 bit with 54-mu W power consumption. The microwatt power consumption and the small chip area of the proposed front-end circuit make it very suitable for a capacitive sensor interface in smart sensor chips.

关键词： Capacitance measurement dual-slope integration smart sensor interface

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Embedded Configurable sensor interface Devices for Seamless Data Acquisition

Embedded Configurable Sensor Interface Devices for Seamless ...

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Telecommunications Forum Telfor

作者： Uldis Grunde Institute of Electronics and Computer Science

ISBN: (纸本)9781479914180

The presented embedded configurable interface device is a feasible solution for interfacing different types of smart sensor systems and user devices. A micro-controller with dedicated I/O interface driver and a smart sensor communication driver is necessary in creating the seamless interface between end-user and smart sensors systems.

关键词： smart sensor interface User-device configurable interface Micro-controller based interface device

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Highly Sensitive smart Flow sensor with Frequency and Duty Cycle Output

Highly Sensitive Smart Flow Sensor with Frequency and Duty C...

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24th Eurosensors International Conference

作者： Dalola, S. Cerimovic, S. Kohl, F. Schalko, J. Ferrari, V. Marioli, D. Keplinger, F. Univ Brescia Dept Informat Engn Via Branze 38 I-25123 Brescia Italy Vienna Univ Technol Inst Sensor & Actuator Syst A-1040 Vienna Austria Austrian Acad Sci Inst Integrated Sensor Syst A-2700 Wiener Neustadt Austria

A thermal flow sensor with smart electronic interface is presented. The sensor is based on four germanium thermistors embedded in a thin membrane. The thermistors form a Wheatstone bridge supplied with a constant current. Both bridge output voltage and voltage at the bridge supply terminals are functions of the flow offering high initial sensitivity and wide measurement range, respectively. The signal interface is based on a relaxation oscillator. The circuit provides a rectangular-wave output whose frequency is related to the bridge unbalance, whereas the duty cycle is a function of the voltage at the bridge supply terminals. Hence, both sensor signals are simultaneously and independently carried on the same output signal, featuring non-monotonic characteristic over a wide flow range accompanied with a very high sensitivity at low flow velocities. Moreover, as the circuit excites the bridge with a constant current, the connection of remote sensors without accuracy degradation is possible. (C) 2010 Published by Elsevier Ltd.

关键词： thermal flow sensor smart sensor interface resistance-controlled oscillator

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Highly sensitive smart flow sensor with frequency and duty cycle output

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Procedia Engineering 2010年 5卷 528-531页

作者： S. Dalola S. Ćerimović F. Kohl J. Schalko V. Ferrari D. Marioli F. Keplinger Department of Information Engineering University of Brescia via Branze 38 I-25123 Brescia Italy Institute of Sensor and Actuator Systems Vienna University of Technology Gußhausstraße 27-29 A-1040 Vienna Austria Institute for Integrated Sensor Systems Austrian Academy of Sciences Viktor Kaplan Straße 2 A-2700 Wiener Neustadt Austria

关键词： Thermal flow sensor smart sensor interface Resistance-controlled oscillator

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Digital and Analog Reconfiguration Techniques for Rapid smart sensor System Prototyping

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sensor LETTERS 2009年第6期7卷 1113-1118页

作者： Morales, D. P. Garcia, A. Martinez Olmos, A. Banqueri, J. Palma, A. J. Univ Granada Dpto Elect & Tecnol Computadores E-18071 Granada Spain

This short communication shows a system architecture for smart sensor signal conditioning that takes advantage of the synergy between different flavors of reconfigurable devices. A Field Programmable Analog Array (FPAA) is used for building reconfigurable analog signal conditioning circuits, while a Field Programmable Gate Array (FPGA) automatically and dynamically loads digital control and processing modules for sensor systems This system includes a sensor detection component, so when a sensor is identified, the specific configuration for the analog circuitry required by the sensor is downloaded to the analog reconfigurable device. Simultaneously, the adequate digital processing configuration is loaded into the reconfigurable section of the digital device. This platform has been tested by conditioning two different sensors simultaneously a temperature sensor makes use of analog reconfiguration techniques that allow the increase of analog-to-digital conversion resolution, while an IEEE 1451 4-compliant pressure sensor takes advantage of the plug-and-play capabilities offered by the dynamic reconfiguration of both devices.

关键词： smart sensor interface Field Programmable Analog Array (FPAA) Field Programmable Gate Array (FPGA) sensors Dynamic Reconfiguration

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A universal transducer interface for capacitive and resistive sensor elements

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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 1997年第3期14卷 249-260页

作者： vanderGoes, FML Meijer, GCM DELFT UNIV TECHNOL ELECT RES LABDELFTNETHERLANDS DELFT UNIV TECHNOL ELECT LABDELFTNETHERLANDS PHILIPS RES LABS TRANSCEIVERS GRPEINDHOVENNETHERLANDS

This paper presents a new universal transducer interface. This interface, which is read out by a microcontroller, services the following sensor elements: capacitors, platinum resistors, thermistors, resistive bridges and potentiometers. The A/D conversion is based on a first-order oscillator A combination of classical and some new measurement techniques has been applied on a single chip to obtain high accuracy, good long-term stability and a reduction of the effects of interference and parasitic elements. The circuit has been fabricated in a 0.7 mu m CMOS process. The main test results are: an accuracy of 10-15 bits and a resolution up to 16 bits while the measurement time is in the range 1-100ms. These results hold over the temperature range -20 degrees-C to 80 degrees-C. Calibration of the electronic part is not required. The number of external components has been kept to a minimum.

关键词： transducer interface smart sensor system smart sensor interface bridge interface captive interface universal transducer interface

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