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Using meta-heuristics and machine learning for software optimization of parallel computing systems: a systematic literature review

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COMPUTING 2019年第8期101卷 893-936页

作者： Memeti, Suejb Pllana, Sabri Binotto, Alecio Kolodziej, Joanna Brandic, Ivona Linnaeus Univ Dept Comp Sci S-35195 Vaxjo Sweden IBM Res Sao Paulo Brazil Cracow Univ Technol PL-31155 Krakow Poland Vienna Univ Technol Inst Software Technol & Interact Syst Elect Commerce Grp A-1040 Vienna Austria

While modern parallel computing systems offer high performance, utilizing these powerful computing resources to the highest possible extent demands advanced knowledge of various hardware architectures and parallel programming models. Furthermore, optimized software execution on parallel computing systems demands consideration of many parameters at compile-time and run-time. Determining the optimal set of parameters in a given execution context is a complex task, and therefore to address this issue researchers have proposed different approaches that use heuristic search or machine learning. In this paper, we undertake a systematic literature review to aggregate, analyze and classify the existing software optimization methods for parallel computing systems. We review approaches that use machine learning or meta-heuristics for software optimization at compile-time and run-time. Additionally, we discuss challenges and future research directions. The results of this study may help to better understand the state-of-the-art techniques that use machine learning and meta-heuristics to deal with the complexity of software optimization for parallel computing systems. Furthermore, it may aid in understanding the limitations of existing approaches and identification of areas for improvement.

关键词： Parallel computing Machine learning Meta-heuristics software optimization

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software optimization of Advanced Encryption Standard for Ultra-Low-Power MSP430 6th

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6th Computer Science On-Line Conference (CSOC)

作者： Fujdiak, Radek Mlynek, Petr Misurec, Jiri Slacik, Janko Brno Univ Technol Dept Telecommun Tech 12 Brno 61600 Czech Republic

ISBN: (纸本)9783319571416

The Internet of Things (IoT) is undoubtedly a current topic for private and public sector. Nowadays, the communication technologies allow to connect even a simplest physical object often with very limited physical resources. The IoT cover among the others also many areas with sensitive data, where the limited devices are also used. The use of these limited devices keep the security issue as a difficult task. The symmetric ciphers are often considered as a best way to encrypt the communication in the limited devices. Despite the fact that there are many hardware optimized solutions, there are still areas where these solutions cannot be used i.e. due to the limiting price or power. This paper focus on a software optimization of the symmetric cipher on limited micro-controller. Two main implementation are introduced. Further, we provide experimental measurements and possible suggestions for time consumption and memory use reduction.

关键词： Advanced encryption standard Symmetric cipher software optimization Internet of Things Limited devices

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The Dependence of Microprocessor System Energy Consumption on software optimization 37

The Dependence of Microprocessor System Energy Consumption o...

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37th IEEE International Conference on Electronics and Nanotechnology (ELNANO)

作者： Sushko, Sergii Chemeris, Alexander Pukhov Inst Modeling Energy Engn Dept Math & Econometr Modeling Kiev Ukraine

ISBN: (纸本)9781538617014

Energy efficiency and computational time become the key usability factors of the low power computational systems. In this sense optimization of the source code is a great challenge to make low power computational system competitive relative to other and adorable for the customers. The paper describes several experiments with a modern low power system that shows the influence of the program loop optimization on microprocessor system power consumption. Conclusions about positive effect of the automatic software optimization are presented.

关键词： low power software optimization tiling parallelization polyhedral model

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optimization Strategy of Satellite Signal Processing software based on Feiteng FT-2000 Computing Board 20

Optimization Strategy of Satellite Signal Processing Softwar...

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20th Int Conf on Ubiquitous Comp and Communicat (IUCC) / 20th Int Conf on Comp and Information Technology (CIT) / 4th Int Conf on Data Science and Computational Intelligence (DSCI) / 11th Int Conf on Smart Computing, Networking, and Serv (SmartCNS)

作者： Wu, Keyu Wu, Fengge Zhao, Junsuo Chinese Acad Sci Inst Software Univ Chinese Acad Sci Beijing Peoples R China

ISBN: (纸本)9781665466677

At present, GPU and FPGA have become conventional acceleration methods for software. However, considering about satellite power consumption and heat dissipation, the high-power GPU hardware acceleration method is inapplicable for the on-board environment, at the mean time the low-power FPGA acceleration will greatly increase the development cycle and development cost of application software. Therefore, the application software on the satellite needs to explore for the optimization of the code under the conditions of limited hardware. In response to the above problems, this paper focuses on the running time of the satellite signal processing software, and proposes an effective software optimization strategy. The strategy applies multiple optimization methods including task decomposition, code writing optimization, matrix calculation acceleration library selection, and cpu compilation acceleration to reduce software running time. In the end, the software running time on the satellite computing board is in compliance with the constraints on-board, reducing from 49 minutes to 15 minutes.

关键词： software optimization calculation acceleration Feiteng computing board signal processing

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Improved verification limit for the convergence of the Collatz conjecture

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JOURNAL OF SUPERCOMPUTING 2025年第7期81卷 1-14页

作者： Barina, David Brno Univ Technol Fac Informat Technol Bozetechova 1-2 Brno Czech Republic

This article presents our project, which aims to verify the Collatz conjecture computationally. As a main point of the article, we introduce a new result that pushes the limit for which the conjecture is verified up to 271\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$2<^>{71}$$\end{document}. We present our baseline algorithm and then several sub-algorithms that enhance acceleration. The total acceleration from the first algorithm we used on the CPU to our best algorithm on the GPU is 1335x\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$1\,335\times$$\end{document}. We further distribute individual tasks to thousands of parallel workers running on several European supercomputers. Besides the convergence verification, our program also checks for path records during the convergence test. We found four new path records.

关键词： Collatz conjecture software optimization Parallel computing Number theory

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Evaluation of software-Optimized Protocols for Acoustic Noise Reduction During Brain MRI at 7 Tesla

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JOURNAL OF MAGNETIC RESONANCE IMAGING 2025年第0期 2025 Mar 6页

作者： Glans, Anton Wennberg, Linda Wilen, Jonna Lindgren, Lenita Sundgren, Pia C. Martensson, Johan Bloch, Karin Markenroth Hansson, Boel Umea Univ Dept Nursing Umea Sweden Umea Univ Dept Diagnost & Intervent Radiat Phys Umea Sweden Lund Univ Fac Med Dept Clin Sci Lund Diagnost Radiol Lund Sweden Skane Univ Hosp Dept Med Imaging & Physiol Lund Sweden Lund Univ Fac Med Lund BioImaging Ctr Lund Sweden Lund Univ Dept Clin Sci Lund Fac Med Logoped Phoniatr & Audiol Lund Sweden

Background MR-generated acoustic noise may be particularly concerning at 7-Tesla (T) systems. Noise levels can be reduced by altering gradient output using software optimization. However, such alterations might influence image quality or prolong scan times, and these optimizations have not been well characterized. Purpose To evaluate image quality, sound pressure levels (SPLs), and perceived noise levels when using the acoustic noise reduction technique SofTone for T-2-weighted fast spin echo (T2W FSE) and three-dimensional T-1-weighted turbo field echo (3D T1W TFE), and to compare with conventional imaging during 7-T brain MRI. Study Type Prospective. Subjects Twenty-eight volunteers underwent brain MRI, with n = 26 for image quality evaluations. Field Strength/Sequence Conventional and SofTone versions of T2W FSE and 3D T1W TFE at 7 T. Assessment Peak SPLs (A-weighted decibels, dBA), participant-perceived noise levels (Borg CR10-scale), qualitative image assessments by three neuroradiologists (four-graded ordinal scales), interrater reliability, and percentage agreement. Statistical TestPaired t-test, Wilcoxon's Signed-Rank Test, and Krippendorff's alpha;p < 0.05 were considered statistically significant. Results SofTone significantly reduced peak SPLs: from 116.3 to 97.0 dBA on T2W FSE, and from 123.7 to 101.5 dBA on 3D T1W TFE. SofTone was perceived as significantly quieter than conventional scanning. T2W FSE showed no significant differences in image quality assessments (p = 0.21-1.00), except one radiologist noting significantly less artifact interference with SofTone. General image quality remained acceptable for 3D T1W TFE, though one radiologist scored it significantly lower with SofTone (mean scores: 3.08 vs. 3.65), and two radiologists observed significantly worse white and gray matter differentiation with SofTone (mean scores: 3.19 vs. 3.54;2.27 vs. 2.81). Data Conclusion SofTone can significantly reduce sound intensity and perceived noise levels while m

关键词： hearing protection MR safety software optimization ultra-high field MRI

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Vectorized Implementation of Kyber and Dilithium on 32-bit Cortex-A Series

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IEEE ACCESS 2024年 12卷 104414-104428页

作者： Kim, Youngbeom Yoon, Seungyong Seo, Seog Chung Kookmin Univ Dept Financial Informat Secur Seoul 02707 South Korea Elect & Telecommun Res Inst Cyber Secur Res Div Daejeon 34129 South Korea

In the field of Post-Quantum Cryptography (PQC), which typically demands more memory and relatively lower performance compared to Elliptic-Curve Cryptography (ECC), recent studies have been actively focused on neon-based parallel implementations for the 64-bit ARMv8-based Cortex-A series. However, research into implementing PQC on the widely adopted 32-bit ARMv7-based Cortex-A series remains insufficient. In this paper, we present the first instance of optimized implementation of Crystals-Kyber and Crystals-Dilithium, a Key Encapsulation Mechanism (KEM) and a Digital Signature Algorithm (DSA) selected by National Institute of Standards and Technology (NIST) for standardization, on a 32-bit ARMv7-based Cortex-A device. For computational efficiency, we finely tune widely used signed Montgomery multiplication and Barrett multiplication methods to take full advantage of the computational capabilities of NEON engine, a kind of Single-Instruction-Multiple-Data (SIMD) extension, available on the target device. Particularly, we propose improvements to internal parameters and operational techniques in Montgomery and Barrett arithmetic to preserve parallel processing logic. Moreover, we present an optimized merging technique tailored for the NEON engine of ARMv7, aimed at accelerating Number Theoretic Transform (NTT)-based polynomial multiplication. Compared to the state-of-the-art codes of PQM4, our approach achieves significant performance enhancements in Kyber and Dilithium: 62% (54%) for NTT, 50% (62%) for Point multiplication, and 56% (55%) for inverse NTT (NTT-1). Regarding the complete schemes, our implementations outperform the vectorized reference implementations, showing improvements of 50% (14%) in Key Generation, 43% (41%) in Encapsulation (Signing), and 52% (21%) in Decapsulation (Verifying) processes for Kyber768 (Dilithium3), respectively.

关键词： ARMv7 Cortex-A series NEON efficient implementation software optimization vectorization implementation embedded security post-quantum cryptography Crystals-Kyber Crystals-Dilithium ARMv7 Cortex-A series NEON efficient implementation software optimization vectorization implementation embedded security post-quantum cryptography Crystals-Kyber Crystals-Dilithium

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Efficient optimization of MS Office 2013+Password Cracking and PBKDF2-HMAC-SHA2 on GPUs

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IEEE ACCESS 2024年 12卷 96436-96448页

作者： Kim, Dongcheon Seo, Seog Chung Kookmin Univ Dept Financial Informat Secur Seoul 02707 South Korea

The increasing sensitivity of personal information has led to the widespread adoption of encryption technology for unstructured files and various applications. However, this presents significant challenges for law enforcement agencies tasked with gathering evidence for crime investigations and prosecutions. The use of encryption to impede forensic efforts poses difficulties, as passwords to encrypted files cannot be easily obtained. Consequently, there is a pressing need to develop high-speed techniques for cracking encrypted files to access critical evidence. To address this challenge, our research focused on optimizing the PBKDF2-HMAC-SHA2 algorithm, commonly used for password protection, and enhancing methods for cracking MS Office 2013+ files, a widely used office suite. We implemented optimizations at both the algorithmic and architectural levels. Algorithmically, we concentrated on reducing memory accesses and eliminating redundant computations within SHA2 and HMAC. Architecturally, we optimized memory access patterns, utilized specialized memory, and improved thread placement to enhance throughput performance. As a result, we achieved significant performance improvements. For PBKDF2-HMAC-SHA2, we saw a 29% improvement on the RTX3090 and a 33% improvement on the RTX4090 compared to Hashcat, the most popular open-source password recovery tool. For cracking MS Office 2013+ files, we achieved performance gains of up to 15% on the RTX3090 and up to 9% on the RTX4090 compared to commercial software like Passware and Elcomsoft. Since our software is open source, it can be used to accelerate password cracking efforts involving HMAC and hash functions. Moreover, its architecture can serve as a reference for developing parallel password-cracking tools.

关键词： Passwords optimization Cryptography Encryption Security Graphics processing units Hash functions Parallel processing HMAC SHA2 PBKDF2 MS Office 2013+ password cracking efficient implementation software optimization parallel computing GPU CUDA

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Accelerating Falcon Post-Quantum Digital Signature Algorithm on Graphic Processing Units

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Computers, Materials & Continua 2023年第4期75卷 1963-1980页

作者： Seog Chung Seo Sang Woo An Dooho Choi Kookmin University Seoul02707Korea Telecommunications Technology Association(TTA) Gyeonggi-do13591Korea Korea University Sejong30019Korea

Since 2016,the National Institute of Standards and Technology(NIST)has been performing a competition to standardize post-quantum cryptography(PQC).Although Falcon has been selected in the competition as one of the standard PQC algorithms because of its advantages in short key and signature sizes,its performance overhead is larger than that of other lattice-based *** study presents multiple methodologies to accelerate the performance of Falcon using graphics processing units(GPUs)for server-side *** GPU porting significantly degrades performance because the Falcon reference codes require recursive functions in its sampling ***,an iterative sampling approach for efficient parallel processing is *** this study,the Falcon software applied a fine-grained execution model and reported the optimal number of threads in a thread ***,the polynomial multiplication performance was optimized by parallelizing the number-theoretic transform(NTT)-based polynomial multiplication and the fast Fourier transform(FFT)-based ***,dummy-based parallel execution methods have been introduced to handle the thread divergence *** presented Falcon software on RTX 3090 NVIDA GPU based on the proposed methods with Falcon-512 and Falcon-1024 parameters outperform at 35.14,28.84,and 34.64 times and 33.31,27.45,and 34.40 times,respectively,better than the central processing unit(CPU)reference implementation using Advanced Vector Extensions 2(AVX2)instructions on a Ryzen 95900X running at 3.7 GHz in key generation,signing,and verification,***,the proposed Falcon software can be used in servers managing multiple concurrent clients for efficient certificate verification and be used as an outsourced key generation and signature generation server for Signature as a Service(SaS).

关键词： DSA Falcon GPU CUDA software optimization

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The New is the Well-Forgotten Old-F4 Algorithm optimization

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COMPUTATIONAL MATHEMATICS AND MATHEMATICAL PHYSICS 2025年第3期65卷 582-590页

作者： Styopkin, S. M. Yandex Moscow 119034 Russia

The Grobner basis is a fundamental concept in computational algebra. F4 is one of the fastest algorithms for computing Grobner basis. In this paper, we will discuss the process of writing effective F4. Despite the fact that this work focuses on algorithms from computational algebra, some of the results and ideas presented here may have broader applications beyond this specific subject area. In general, the theory described below can be regarded as an abstraction, as it progresses through the text. This is because the text is not actually about the F4 algorithm itself, but rather about the power of profiling, unconventional techniques, and selecting the appropriate memory model. We will provide examples of inefficient usage of the standard library, recall the fundamental principles of optimization in order to apply them as efficiently as possible to obtain the fastest F4 algorithm, using non-traditional approaches.

关键词： computational algebra F4 software optimization C plus profiling

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