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Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming

作者： Bratin Saha Ali-Reza Adl-Tabatabai Richard L. Hudson Chi Cao Minh Benjamin Hertzberg Intel Corporation Stanford University Palo Alto California

ISBN: (纸本)9781595931894

Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed this concurrency using locks (mutex based synchronization). Unfortunately, lock based synchronization often leads to deadlocks, makes fine-grained synchronization difficult, hinders composition of atomic primitives, and provides no support for error recovery. Transactions avoid many of these problems, and therefore, promise to ease concurrent *** describe a software transactional memory (STM) system that is part of McRT, an experimental Multi-Core RunTime. The McRT-STM implementation uses a number of novel algorithms, and supports advanced features such as nested transactions with partial aborts, conditional signaling within a transaction, and object based conflict detection for C/C++ applications. The McRT-STM exports interfaces that can be used from C/C++ programs directly or as a target for compilers translating higher level linguistic *** present a detailed performance analysis of various STM design tradeoffs such as pessimistic versus optimistic concurrency, undo logging versus write buffering, and cache line based versus object based conflict detection. We also show a MCAS implementation that works on arbitrary values, coexists with the STM, and can be used as a more efficient form of transactional memory. To provide a baseline we compare the performance of the STM with that of fine-grained and coarse-grained locking using a number of concurrent data structures on a 16-processor SMP system. We also show our STM performance on a non-synthetic workload -- the Linux sendmail application.

关键词： atomic constructs runtime environment two-phase locking and read-versioning software transactional memory

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VectorSTM: software transactional memory without atomic instructions

VectorSTM: software transactional memory without atomic inst...

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The Third International Joint Conference on Computational Science and Optimization(第三届计算科学与优化国际大会 CSO 2010)

作者： Lin Peng Xiao-qiang Zhang Lun-guo Xie Xin-yan Xie School of Computer Science National University of Defense Technology Changsha China School of Science National University of Defense Technology Changsha China

transactional memory(TM) is a promising way to coordinate concurrent threads in multi-core processors. software transactional memory (STM) can run on conventional processors without additional hardware support. In this paper we propose VectorSTM which reduces the cost of centralized concurrency control. VectorSTM employs distributed vector timestamps instead of a single global timestamp to track the progress of transactions. Conflict detecting and transaction committing are done by polling thread local bloom filter queues which are indexed by the vector timestamps. Without employing any atomic instructions, VectorSTM reduces synchronization cost on the global timestamp variable and provides more concurrency. VectorSTM provides privatization safety which is critical to software transactional memory safety and avoids livelock and starvation by effective contention manager. We evaluate VectorSTM with STAMP benchmarks and the results show that the design offer superior performance or stronger semantics than TL2 and RingSTM algorithm. On particular tests VectorSTM outperforms TL2 and RingSTM 27％ and 41％ respectively with 8 threads running.

关键词： multi-core processors software transactional memory vector timestamp atomic instructions

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Asynchronous lease-based replication of software transactional memory 10

Asynchronous lease-based replication of software transaction...

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Proceedings of the ACM/IFIP/USENIX 11th International Conference on Middleware

作者： Nuno Carvalho Paolo Romano Luís Rodrigues INESC-ID/IST

ISBN: (纸本)9783642169540

software transactional memory (STM) systems have emerged as a powerful middleware paradigm for parallel programming. At current date, however, the problem of how to leverage replication to enhance dependability and scalability of STMs is still largely unexplored. In this paper we present Asynchronous Lease Certification (ALC), an innovative STM replication scheme that exploits the notion of asynchronous lease to reduce the replica coordination overhead and shelter transactions from repeated abortions due to conflicts originated on remote nodes. These features allow ALC to achieve up to a tenfold reduction of the commit latency phase in scenarios of low contention when compared with state of the art fault-tolerant replication schemes, and to boost the throughput of longruning transactions by a 4x factor in high conflict scenarios.

关键词： dependability leases replication software transactional memory

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Nebelung:: Execution environment for transactional OpenMP

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INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 2008年第3期36卷 326-346页

作者： Milovanovic, Milos Ferrer, Roger Gajinov, Vladimir Unsal, Osman S. Cristal, Adrian Ayguade, Eduard Valero, Mateo Barcelona Supercomp Ctr BSC CNS Barcelona 08034 Spain Univ Politecn Cataluna Dept Comp Architecture Barcelona Spain

Future generations of Chip Multiprocessors (CMP) will provide dozens or even hundreds of cores inside the chip. Writing applications that benefit from the massive computational power offered by these chips is not going to be an easy task for mainstream programmers who are used to sequential algorithms rather than parallel ones. This paper explores the possibility of using transactional memory (TM) in OpenMP, the industrial standard for writing parallel programs on shared-memory architectures, for C, C++ and Fortran. One of the major complexities in writing OpenMP applications is the use of critical regions (locks), atomic regions and barriers to synchronize the execution of parallel activities in threads. TM has been proposed as a mechanism that abstracts some of the complexities associated with concurrent access to shared data while enabling scalable performance. The paper presents a first proof-of-concept implementation of OpenMP with TM. Some language extensions to OpenMP are proposed to express transactions. These extensions are implemented in our source-to-source OpenMP Mercurium compiler and our software transactional memory (STM) runtime system Nebelung that supports the code generated by Mercurium. Hardware transactional memory (HTM) or Hardware-assisted STM (HaSTM) are seen as possible paths to make the tandem TM-OpenMP more scalable. In the evaluation section we show the preliminary results. The paper finishes with a set of open issues that still need to be addressed, either in OpenMP or in the hardware/software implementations of TM.

关键词： compiler OpenMP runtime system software transactional memory

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Clojure for Number Crunching on Multicore Machines

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COMPUTING IN SCIENCE & ENGINEERING 2012年第6期14卷 12-23页

作者： Kalin, Martin Miller, David Depaul Univ Coll Comp & Digital Media Chicago IL 60604 USA

Clojure is a Lisp language designed to run on a Java Virtual Machine (JVM) and interoperate automatically with all Java libraries. However, compared to Java, Clojure has a concurrency API that encourages programmers to take advantage of multicore architectures through multithreading, but Clojure doesn't burden programmers with low-level thread-coordination tasks.

关键词： Instruction Sets Java Concurrent Computing Synchronization Libraries Programming Scientific Computing Concurrency Multithreading Synchronization Java Lisp software transactional memory Multiversion Concurrency Control

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Comparing the the performance of concurrent hash tables implemented in Haskell

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SCIENCE OF COMPUTER PROGRAMMING 2019年 173卷 56-70页

作者： Duarte, Rodrigo Medeiros Du Bois, Andre Rauber Pilla, Mauricio Lima Cavalheiro, Gerson Geraldo H. Sander Reiser, Renata Hax Univ Fed Pelotas PPGC Gomes Carneiro 1 BR-96010610 Pelotas RS Brazil

This paper presents seven concurrent hash table implementations in Haskell, ranging from low-level synchronization mechanisms to high-level ones such as transactional memories. The hash tables were compared using different initial sizes, load factors, data types and hash functions. We also present a case study on implementing a color palette algorithm using the hash tables. The result of the comparison between the algorithms shows that the implementation using the STM Haskell transactional memory library and fine-grain synchronization provides the best performance and good scalability, followed by the implementation using lock striping and MVars. (C) 2018 Elsevier B.V. All rights reserved.

关键词： software transactional memory Haskell Concurrent programming

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Integrating Caching and Prefetching Mechanisms in a Distributed transactional memory

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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 2011年第8期22卷 1284-1298页

作者： Dash, Alokika Demsky, Brian Univ Calif Irvine Dept Elect Engn & Comp Sci Irvine CA 92697 USA

We present a distributed transactional memory system that exploits a new opportunity to automatically hide network latency by speculatively prefetching and caching objects. The system includes an object caching framework, language extensions to support our approach, and symbolic prefetches. To our knowledge, this is the first prefetching approach that can prefetch objects whose addresses have not been computed or predicted. Our approach makes aggressive use of both prefetching and caching of remote objects to hide network latency while relying on the transaction commit mechanism to preserve the simple transactional consistency model that we present to the developer. We have evaluated this approach on three distributed benchmarks, five scientific benchmarks, and several microbenchmarks. We have found that our approach enables our benchmark applications to effectively utilize multiple machines and benefit from prefetching and caching. We have observed a speedup of up to 7.26x for distributed applications on our system using prefetching and caching and a speedup of up to 5.55x for parallel applications on our system.

关键词： Distributed shared memory software transactional memory prefetching

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Non-interference and local correctness in transactional memory

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THEORETICAL COMPUTER SCIENCE 2017年 688卷 103-116页

作者： Kuznetsov, Petr Peri, Sathya Telecom ParisTech Paris France IIT Hyderabad CSE Dept Hyderabad Andhra Pradesh India

transactional memory promises to make concurrent programming tractable and efficient by allowing the user to assemble sequences of actions in atomic transactions with all-or nothing semantics. It is believed that, by its very virtue, transactional memory must ensure that all committed transactions constitute a serial execution respecting the real-time order. In contrast, aborted or incomplete transactions should not "take effect." But what does "not taking effect" mean exactly? It seems natural to expect that aborted or incomplete transactions do not appear in the global serial execution, and, thus, no committed transaction can be affected by them. We investigate another, less obvious, feature of "not taking effect" called non-interference: aborted or incomplete transactions should not force any other transaction to abort. In the strongest form of non-interference that we explore in this paper, by removing a subset of aborted or incomplete transactions from the history, we should not be able to turn an aborted transaction into a committed one without violating the correctness criterion. We show that non-interference is, in a strict sense, not implementable with respect to the popular criterion of opacity that requires all transactions (be they committed, aborted or incomplete) to witness the same global serial execution. In contrast, when we only require local correctness, non-interference is implementable. Informally, a correctness criterion is local if it only requires that every transaction can be serialized along with (a subset of) the transactions committed before its last event (aborted or incomplete transactions ignored). We give a few examples of local correctness properties, including the recently proposed criterion of virtual world consistency, and present a simple though efficient implementation that satisfies non-interference and local opacity. (C) 2016 Elsevier B.V. All rights reserved.

关键词： software transactional memory Correctness criterion Opacity Non-interference Permissiveness

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MODULARISING VERIFICATION OF DURABLE OPACITY

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LOGICAL METHODS IN COMPUTER SCIENCE 2020年第3期18卷

作者： Bila, Eleni Derrick, John Doherty, Simon Dongol, Brijesh Schellhorn, Gerhard Wehrheim, Heike Univ Surrey Guildford Surrey England Univ Sheffield Sheffield S Yorkshire England Univ Augsburg Augsburg Germany Carl von Ossietzky Univ Oldenburg Oldenburg Germany

Non-volatile memory (NVM), also known as persistent memory, is an emerging paradigm for memory that preserves its contents even after power loss. NVM is widely expected to become ubiquitous, and hardware architectures are already providing support for NVM programming. This has stimulated interest in the design of novel concepts ensuring correctness of concurrent programming abstractions in the face of persistency and in the development of associated verification approaches. software transactional memory (STM) is a key programming abstraction that supports concurrent access to shared state. In a fashion similar to linearizability as the correctness condition for concurrent data structures, there is an established notion of correctness for STMs known as opacity. We have recently proposed durable opacity as the natural extension of opacity to a setting with non-volatile memory. Together with this novel correctness condition, we designed a verification technique based on refinement. In this paper, we extend this work in two directions. First, we develop a durably opaque version of NOrec (no ownership records), an existing STM algorithm proven to be opaque. Second, we modularise our existing verification approach by separating the proof of durability of memory accesses from the proof of opacity. For NOrec, this allows us to re-use an existing opacity proof and complement it with a proof of the durability of accesses to shared state.

关键词： Nonvolatile memory software transactional memory opacity formal verification

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A transactional model for automatic exception handling

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COMPUTER LANGUAGES SYSTEMS & STRUCTURES 2011年第1期37卷 43-61页

作者： Cabral, Bruno Marques, Paulo Univ Coimbra Dept Informat Engn CISUC P-3030290 Coimbra Portugal

software reliability and error handling are concepts that any programmer knows and deals with on a daily basis. Even so, studies suggest that the current approach to exception handling raises fundamental incompatibilities with object-oriented concepts, being a major cause for the lack of quality on error handling code. In this paper, we propose an exception handling model that makes the runtime environment responsible for automatically dealing with abnormal situations. The platform provides a number of benign recovery actions that are able to deal automatically with most common exception types. Whenever an exception is raised, and a benign recovery method can be found, code is re-executed from a clean transactional state. In this approach try blocks not only represent a nesting level where a fault can occur but also a block that can be re-executed transactionally as a clean slate. For validating the approach two case studies were performed. One involved providing automatic exception handling for Glassfish's Java Messaging System implementation and the other for the Hipergate CRM application. Both showed that increased robustness is possible while freeing the programmer from manually writing extensive error-handling code. (C) 2010 Elsevier Ltd. All rights reserved.

关键词： Exception handling model software transactional memory Recovery blocks Fault tolerance Object-oriented programming languages

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