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25th International Conference on Compiler Construction (CC)

作者： Zhang, Minjia Biswas, Swarnendu Bond, Michael D. Ohio State Univ Columbus OH 43210 USA

ISBN: (纸本)9781450342414

It is notoriously difficult to achieve both correctness and scalability for many shared-memory parallel programs. To improve correctness and scalability, researchers have developed various kinds of parallel runtime support such as multithreaded record & replay and software transactional memory. Existing forms of runtime support slow programs significantly in order to track an execution's cross-thread dependences accurately. This paper investigates the potential for runtime support to hide latency introduced by dependence tracking, by tracking dependences in a relaxed way-meaning that not all dependences are tracked accurately. The key challenge in relaxing dependence tracking is to preserve both the program's semantics and the runtime support's guarantees. We present an approach called relaxed dependence tracking (RT) and demonstrate its potential by building two types of RT-based runtime support. Our evaluation shows that RT hides much of the latency incurred by dependence tracking, although RT-based runtime support incurs costs and complexity in order to handle relaxed dependence information. By demonstrating how to relax dependence tracking to hide latency while preserving correctness, this work shows the potential for addressing a key cost of dependence tracking, thus advancing knowledge in the design of parallel runtime support.

关键词： Runtime support for parallelism dependence tracking multithreaded record & replay software transactional memory

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Approximately Opaque Multi-version Permissive transactional memory 45

Approximately Opaque Multi-version Permissive Transactional ...

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45th International Conference on Parallel Processing (ICPP)

作者： Assiri, Basem Busch, Costas Louisiana State Univ Baton Rouge LA 70803 USA

ISBN: (纸本)9781509028252

In multi-version transactional memory read-only transactions do not have to abort, while update transactions may abort. There are situations where system delays do not allow to have precise consistency, such as in large scale network and database applications, due to network delays or other factors. In order to cope with such systems, we introduce here the notion of approximate consistency in transactional memory. We define K-opacity as a relaxed consistency property where read instructions in a read-only transaction may read one of K most recent written values, while read instructions in an update transaction read always the latest value. The relaxed consistency for read-only transactions has two benefits: (i) it reduces space requirements, since a new object version is saved once every K object updates, which reduces the total number of saved object versions by a factor of K, and (ii) it reduces the number of aborts, since there is smaller chance for read-only transactions to abort update transactions. This framework allows to have worst-case consistency guarantees and simultaneously good performance characteristics. In addition to correctness proofs, we demonstrate the performance benefits of our approach with experimental analysis. We tested our algorithm for different values of K using different benchmarks and we observed that when we increase K the number of aborts decreases and at the same time the throughput increases.

关键词： Multi-version transactional memory software transactional memory Opacity K-opacity Approximate consistency

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Improving Performance of transactional Applications through Adaptive transactional memory 24

Improving Performance of Transactional Applications through ...

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24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)

作者： Jeyakumaran, Thireshan Atoofian, Ehsan Xiao, Yang Li, Zhen Jannesari, Ali Lakehead Univ Thunder Bay ON Canada Tech Univ Darmstadt Darmstadt Germany

ISBN: (纸本)9781467387767

transactional memory (TM) has become progressively widespread especially with hardware transactional memory implementation becoming increasingly available. In this paper, we focus on Restricted transactional memory (RTM) in Intel's Haswell processor and show that performance of RTM varies across applications. While RTM enhances performance of some applications relative to software transactional memory (STM), in some others, it degrades performance. We exploit this variability and present an adaptive system which is a static approach that switches between HTM and STM in transaction granularity. By incorporating a decision tree prediction module, we are able to predict the optimum TM system for a given transaction based on its characteristics. Our adaptive system supports both HTM and STM with the aim of increasing an application's performance. We show that our adaptive system has an average overall speedup of 20.82% over both TM systems.

关键词： Restricted transactional memory software transactional memory Decision Tree Performance

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A Type System for Counting Logs of Multi-threaded Nested transactional Programs 12th

A Type System for Counting Logs of Multi-threaded Nested Tra...

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12th International Conference on Distributed Computing and Internet Technology (ICDCIT)

作者： Anh-Hoang Truong Dang Van Hung Duc-Hanh Dang Xuan-Tung Vu VNU Univ Engn & Technol Hanoi Vietnam Japan Adv Inst Sci & Technol Nomi Japan

ISBN: (纸本)9783319280349;9783319280332

We present a type system to estimate an upper bound for the resource consumption of nested and multi-threaded transactional programs. The resource is abstracted as transaction logs. In comparison to our previous work on type and effect systems for transactional Featherweight Java, this work exploits the natural composition of thread creation to give types to sub-terms. As a result, our new type system is simpler and more effective than our previous one. More important, it is more precise than our previous type system. We also show a type inference algorithm that we have implemented in a prototype tool.

关键词： Resource bound software transactional memory Type systems

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Pot: Deterministic transactional Execution

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ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION 2016年第4期13卷 52-52页

作者： Vale, Tiago M. Silva, Joao A. Dias, Ricardo J. Lourenco, Joao M. Univ Nova Lisboa FCT NOVA LINCS DI P-1200 Lisbon Portugal SUSE Linux GmbH Nurnberg Germany FCT UNL Dept Informat P-2829516 Quinta Da Torre Caparica Portugal

This article presents Pot, a system that leverages the concept of preordered transactions to achieve deterministic multithreaded execution of programs that use transactional memory. Preordered transactions eliminate the root cause of nondeterminism in transactional execution: they provide the illusion of executing in a deterministic serial order, unlike traditional transactions that appear to execute in a nondeterministic order that can change from execution to execution. Pot uses a new concurrency control protocol that exploits the serialization order to distinguish between fast and speculative transaction execution modes in order to mitigate the overhead of imposing a deterministic order. We build two Pot prototypes: one using STM and another using off-the-shelf HTM. To the best of our knowledge, Pot enables deterministic execution of programs using off-the-shelf HTM for the first time. An experimental evaluation shows that Pot achieves deterministic execution of TM programs with low overhead, sometimes even outperforming nondeterministic executions, and clearly outperforming the state of the art.

关键词： software transactional memory hardware transactional memory determinism deterministic multithreading concurrency control

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Hybrid STM/HTM for Nested Transactions on OpenJDK

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ACM SIGPLAN NOTICES 2016年第10期51卷 660-676页

作者： Chapman, Keith Hosking, Antony L. Moss, J. Eliot B. Purdue Univ W Lafayette IN 47907 USA Australian Natl Univ Data61 Canberra ACT Australia Univ Massachusetts Amherst MA USA

transactional memory (TM) has long been advocated as a promising pathway to more automated concurrency control for scaling concurrent programs running on parallel hardware. software TM (STM) has the benefit of being able to run general transactional programs, but at the significant cost of overheads imposed to log memory accesses, mediate access conflicts, and maintain other transaction metadata. Recently, hardware manufacturers have begun to offer commodity hardware TM (HTM) support in their processors wherein the transaction metadata is maintained "for free" in hardware. However, HTM approaches are only best-effort: they cannot successfully run all transactional programs, whether because of hardware capacity issues (causing large transactions to fail), or compatibility restrictions on the processor instructions permitted within hardware transactions (causing transactions that execute those instructions to fail). In such cases, programs must include failure-handling code to attempt the computation by some other software means, since retrying the transaction would be futile. Thus, a canonical use of HTM is lock elision: replacing lock regions with transactions, retrying some number of times in the case of conflicts, but falling back to locking when HTM fails for other reasons. Here, we describe how software and hardware schemes can combine seamlessly into a hybrid system in support of transactional programs, allowing use of low-cost HTM when it works, but reverting to STM when it doesn't. We describe heuristics used to make this choice dynamically and automatically, but allowing the transition back to HTM opportunistically. Our implementation is for an extension of Java having syntax for both open and closed nested transactions, and boosting, running on the OpenJDK, with dynamic injection of STM mechanisms (into code variants used under STM) and HTM instructions (into code variants used under HTM). Both schemes are compatible to allow different threads to run concur

关键词： transactional memory nested transactions hardware transactional memory software transactional memory Java Design Experimentation Languages Measurement Performance

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A Synchronization Approach for Increasing Concurrency in software transactional memory

A Synchronization Approach for Increasing Concurrency in Sof...

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The Ninth International Conference on Grid and Cloud Computing(第九届网格与云计算国际学术会议 GCC 2010)

作者： Dan Wu Man Hon Wong Department of Computer Science and Engineering The Chinese University of Hong Kong Shatin New Terr Department of Computer Science and Engineering The Chinese University of Hong Kong Shatin New Ter

software transactional memory (STM) has been a popular paradigm for concurrent computing in modern multi-core architectures. To boost concurrency, recent STM systems have exploited semantics based synchronization approaches. However, only the general notion of commutativity (GC) has been used to derive conflict relations. In this paper, we develop a synchronization approach which combines the notions of right backward commutativity (RBC) and forward commutativity (FC) and determines the conflict relations dynamically by using the context-specific information. The proposed approach can permit more concurrency as the histories accepted by our approach is a strict superset of the union of that accepted by the approaches based on GC, RBC and FC.

关键词： software transactional memory semantics based synchronization concurrency

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VectorSTM: software transactional memory without atomic instructions

VectorSTM: software transactional memory without atomic inst...

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The Third International Joint Conference on Computational Science and Optimization(第三届计算科学与优化国际大会 CSO 2010)

作者： Lin Peng Xiao-qiang Zhang Lun-guo Xie Xin-yan Xie School of Computer Science National University of Defense Technology Changsha China School of Science National University of Defense Technology Changsha China

transactional memory(TM) is a promising way to coordinate concurrent threads in multi-core processors. software transactional memory (STM) can run on conventional processors without additional hardware support. In this paper we propose VectorSTM which reduces the cost of centralized concurrency control. VectorSTM employs distributed vector timestamps instead of a single global timestamp to track the progress of transactions. Conflict detecting and transaction committing are done by polling thread local bloom filter queues which are indexed by the vector timestamps. Without employing any atomic instructions, VectorSTM reduces synchronization cost on the global timestamp variable and provides more concurrency. VectorSTM provides privatization safety which is critical to software transactional memory safety and avoids livelock and starvation by effective contention manager. We evaluate VectorSTM with STAMP benchmarks and the results show that the design offer superior performance or stronger semantics than TL2 and RingSTM algorithm. On particular tests VectorSTM outperforms TL2 and RingSTM 27％ and 41％ respectively with 8 threads running.

关键词： multi-core processors software transactional memory vector timestamp atomic instructions

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Asynchronous lease-based replication of software transactional memory 10

Asynchronous lease-based replication of software transaction...

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Proceedings of the ACM/IFIP/USENIX 11th International Conference on Middleware

作者： Nuno Carvalho Paolo Romano Luís Rodrigues INESC-ID/IST

ISBN: (纸本)9783642169540

software transactional memory (STM) systems have emerged as a powerful middleware paradigm for parallel programming. At current date, however, the problem of how to leverage replication to enhance dependability and scalability of STMs is still largely unexplored. In this paper we present Asynchronous Lease Certification (ALC), an innovative STM replication scheme that exploits the notion of asynchronous lease to reduce the replica coordination overhead and shelter transactions from repeated abortions due to conflicts originated on remote nodes. These features allow ALC to achieve up to a tenfold reduction of the commit latency phase in scenarios of low contention when compared with state of the art fault-tolerant replication schemes, and to boost the throughput of longruning transactions by a 4x factor in high conflict scenarios.

关键词： dependability leases replication software transactional memory

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A new concurrency control mechanism for multi-threaded environment using transactional memory

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JOURNAL OF SUPERCOMPUTING 2015年第11期71卷 4095-4115页

作者： Ghosh, Ammlan Chaki, Rituparna Chaki, Nabendu AGH Univ Sci & Technol Fac Phys & Appl Comp Sci PL-30059 Krakow Poland Univ Calcutta Dept Comp Sci & Engn Kolkata India Univ Calcutta AK Choudhury Sch Informat Technol Kolkata India

software transactional memory (STM) is one of the techniques used towards achieving non-blocking process synchronization in multi-threaded computing environment. In spite of its high potential, one of the major limitations of transactional memory (TM) is that in order to ensure data consistency as well as progress condition, TM often forces transactions to abort. This paper proposes a new concurrency control mechanism. It starts with the existing TM implementations for obstruction freedom and eventually builds a new STM methodology. The primary objective is to reduce aborting of transactions in some typical scenarios. A programming model is described for a chain of update transactions that share the same data object among themselves. Using the proposed approach, any new update transaction appended in this chain need not wait for the earlier transactions to finish. The proposed STM allows wait-free, non-blocking implementation of a mix of read and multiple update transactions on the same shared data object with higher throughput.

关键词： Concurrency control software transactional memory Obstruction freedom

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