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22nd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)

作者： Huang, Jian Allen-Bond, Michael Zhang, Xuechen Georgia Inst Technol Atlanta GA 30332 USA Washington State Univ Vancouver WA USA

ISBN: (纸本)9781450344654

software optimization is constantly a serious concern for developing high-performance systems. To accelerate the workflow execution of a specific functionality, software developers usually define and implement a fast path to speed up the critical and commonly executed functions in the workflow. However, producing a bug-free fast path is nontrivial. Our study on the Linux kernel discloses that a committed fast path can have up to 19 follow-up patches for bug fixing, and most of them are deep semantic bugs, which are difficult to be pinpointed by existing bug-finding tools. In this paper, we present such a new category of software bugs based on our fast-path bug study across various system software including virtual memory manager, file systems, network, and device drivers. We investigate their root causes and identify five error-prone aspects in a fast path: path state, trigger condition, path output, fault handling, and assistant data structure. We find that many of the deep bugs can be prevented by applying static analysis incorporating simple semantic information. We extract a set of rules based on our findings and build a toolkit PALLAS to check fast-path bugs. The evaluation results show that PALLAS can effectively reveal fast-path bugs in a variety of systems including Linux kernel, mobile operating system, software-defined networking system, and web browser.

关键词： software optimization Fast Path Semantic Bugs Static Analysis

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Real Time LP Decoding of LDPC Codes for High Correction Performance Applications

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IEEE WIRELESS COMMUNICATIONS LETTERS 2016年第6期5卷 676-679页

作者： Debbabi, Imen Le Gal, Bertrand Khouja, Nadia Tlili, Fethi Jego, Christophe Carthage Univ High Sch Commun GRESCOM Lab Amilcar 1070 Tunisia IMS Lab F-33400 Talence France

The alternate direction method of multipliers is a recent linear programming error correcting approach which improves the decoding performance of LDPC codes compared with the best BP decoding techniques. In this letter, an efficient implementation of the ADMM LP decoding algorithm on a multicore architecture is presented. Its throughput performance level is about one order of magnitude higher than related works on the same multicore target. The proposed decoder's throughput reaches up to 100 Mb/s which makes it viable for real time applications with tough error correction requirements.

关键词： LDPC code LP ADMM layered scheduling software optimization multicore SIMD SIMT throughput

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Guide Automatic Vectorization by means of Machine Learning: A Case Study of Tensor Contraction Kernels

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IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 2016年第6期E99D卷 1585-1594页

作者： Trouve, Antoine Cruz, Arnaldo J. Murakami, Kazuaki J. Arai, Masaki Nakahira, Tadashi Yamanaka, Eiji Kyushu Univ Dept Engn Fukuoka 8190395 Japan Fujitsu Labs Ltd Kawasaki Kanagawa 2118588 Japan Fujitsu Ltd Tokyo 1057123 Japan

Modern optimizing compilers tend to be conservative and often fail to vectorize programs that would have benefited from it. In this paper, we propose a way to predict the relevant command-line options of the compiler so that it chooses the most profitable vectorization strategy. Machine learning has proven to be a relevant approach for this matter: fed with features that describe the software to the compiler, a machine learning device is trained to predict an appropriate optimization strategy. The related work relies on the control and data flow graphs as software features. In this article, we consider tensor contraction programs, useful in various scientific simulations, especially chemistry. Depending on how they access the memory, different tensor contraction kernels may yield very different performance figures. However, they exhibit identical control and data flow graphs, making them completely out of reach of the related work. In this paper, we propose an original set of software features that capture the important properties of the tensor contraction kernels. Considering the Intel Merom processor architecture with the Intel Compiler, we model the problem as a classification problem and we solve it using a support vector machine. Our technique predicts the best suited vectorization options of the compiler with a cross-validation accuracy of 93.4%, leading to up to a 3-times speedup compared to the default behavior of the Intel Compiler. This article ends with an original qualitative discussion on the performance of software metrics by means of visualization. All our measurements are made available for the sake of reproducibility.

关键词： automatic vectorization machine learning software optimization

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MULTICORE IMPLEMENTATION OF LDPC DECODERS BASED ON ADMM ALGORITHM 41

MULTICORE IMPLEMENTATION OF LDPC DECODERS BASED ON ADMM ALGO...

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41st IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)

作者： Debbabi, Imen Khouja, Nadia Tlili, Fethi Le Gal, Bertrand Jego, Christophe Univ Carthage SUPCOM GRESCOM Lab Carthage Tunisia Univ Bordeaux Bordeaux INP IMS Lab Bordeaux France

ISBN: (纸本)9781479999880

Alternate direction method of multipliers (ADMM) technique has recently been proposed for LDPC decoding. Even though it improves the error rate performance compared with traditional message passing (MP) techniques, it shows a higher computation complexity. In this article, the ADMM decoding algorithm is first described. Then, its computation complexity is analyzed. Finally, an optimized version which benefits from the multi-core processors architecture as well as the ADMM algorithm's parallelism is presented. The optimized version of the ADMM decoder can achieve up to 30 Mbps for standardized LDPC codes on a laptop x86 processor. Therefore, it could guide an efficient GPU implementation for real-time and highthroughput decoding systems requiring correction performances beyond MP-Sum Product Algorithm (SPA) capabilities.

关键词： LDPC decoding ADMM algorithm muti-core software optimization Forward Error Correction codes

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Speeding up R-LWE Post-quantum Key Exchange 21st

Speeding up R-LWE Post-quantum Key Exchange

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21st Nordic Conference on Secure IT Systems (NordSec)

作者： Gueron, Shay Schlieker, Fabian Univ Haifa Dept Math Haifa Israel Intel Corp Israel Deveopment Ctr Haifa Israel Ruhr Univ Bochum Horst Gortz Inst IT Secur Bochum Germany

ISBN: (纸本)9783319475608;9783319475592

Post-quantum cryptography has attracted increased attention in the last couple of years, due to the threat of quantum computers breaking current cryptosystems. In particular, the key size and performance of post-quantum algorithms became a significant target for optimization. In this spirit, Alkim et al. have recently proposed a significant optimization for a key exchange scheme that is based on the R-LWE problem. In this paper, we build on the implementation of Alkim et al., and focus on improving the algorithm for generating a uniformly random polynomial. We optimize three independent directions: efficient pseudorandom bytes generation, decreasing the rejection rate during sampling, and vectorizing the sampling step. When measured on the latest Intel processor Architecture Codename Skylake, our new optimizations improve over Alkim et al. by up to 1.59x on the server side, and by up to 1.54x on the client side.

关键词： Post-quantum key exchange Ring-LWE software optimization AVX2 AVX512 AES-NI

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SEEDS: A software Engineer's Energy-optimization Decision Support Framework 2014

SEEDS: A Software Engineer's Energy-Optimization Decision Su...

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36th International Conference on software Engineering (ICSE)

作者： Manotas, Irene Pollock, Lori Clause, James Univ Delaware Comp Sci Newark DE 19716 USA

ISBN: (纸本)9781450327565

Reducing the energy usage of software is becoming more important in many environments, in particular, battery-powered mobile devices, embedded systems and data centers. Recent empirical studies indicate that software engineers can support the goal of reducing energy usage by making design and implementation decisions in ways that take into consideration how such decisions impact the energy usage of an application. However, the large number of possible choices and the lack of feedback and information available to software engineers necessitates some form of automated decision-making support. This paper describes the first known automated support for systematically optimizing the energy usage of applications by making code-level changes. It is effective at reducing energy usage while freeing developers from needing to deal with the low-level, tedious tasks of applying changes and monitoring the resulting impacts to the energy usage of their application. We present a general framework, SEEDS, as well as an instantiation of the framework that automatically optimizes Java applications by selecting the most energy-efficient library implementations for Java's Collections API. Our empirical evaluation of the framework and instantiation show that it is possible to improve the energy usage of an application in a fully automated manner for a reasonable cost.

关键词： Energy usage software optimization analysis framework

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Accelerated application development: The ORNL Titan experience

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COMPUTERS & ELECTRICAL ENGINEERING 2015年 46卷 123-138页

作者： Joubert, Wayne Archibald, Rick Berrill, Mark Brown, W. Michael Eisenbach, Markus Grout, Ray Larkin, Jeff Levesque, John Messer, Bronson Norman, Matt Philip, Bobby Sankaran, Ramanan Tharrington, Arnold Turner, John Oak Ridge Natl Lab Oak Ridge TN 37831 USA Cray Inc Knoxville TN USA Natl Renewable Energy Lab Golden CO 80401 USA NVIDIA Corp Oak Ridge TN 37831 USA

The use of computational accelerators such as NVIDIA GPUs and Intel Xeon Phi processors is now widespread in the high performance computing community, with many applications delivering impressive performance gains. However, programming these systems for high performance, performance portability and software maintainability has been a challenge. In this paper we discuss experiences porting applications to the Titan system. Titan, which began planning in 2009 and was deployed for general use in 2013, was the first multi-petaflop system based on accelerator hardware. To ready applications for accelerated computing, a preparedness effort was undertaken prior to delivery of Titan. In this paper we report experiences and lessons learned from this process and describe how users are currently making use of computational accelerators on Titan. (C) 2015 Elsevier Ltd. All rights reserved.

关键词： High performance computing Accelerated computing GPU graphics processing units Science applications Code refactoring software optimization

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Using the Greenup, Powerup, and Speedup Metrics to Evaluate software Energy Efficiency 6

Using the Greenup, Powerup, and Speedup Metrics to Evaluate ...

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Sixth International Green and Sustainable Computing Conference

作者： Abdulsalam, Sarah Zong, Ziliang Gu, Qijun Qiu, Meikang Texas State Univ Dept Comp Sci San Marcos TX 78666 USA Pace Univ Dept Comp Sci New York NY 10176 USA

ISBN: (纸本)9781509001729

With recognizing power as a first-class citizen in the HPC community and the growth of software running on battery-driven devices, the need to evaluate software design based on the combined effects of energy and performance has become eminent. Despite of the numerous metrics to evaluate software performance, the study on how to evaluate software energy efficiency is still in its early stage. In this paper, we propose the Greenup, Powerup, and Speedup metrics (GPS-UP) to categorize software implementation and optimization efficiency. The GPS-UP metrics transform the performance, power and energy of a program into a point on the GPS-UP software energy efficiency quadrant graph. We present eight categories of possible scenarios of software optimization, with examples on how to obtain them. Four categories are green (save energy), and four are red (waste energy). Moreover, we compare our metrics to existing metrics such as Energy Delay Product (EDP).

关键词： software energy efficiency software power measurement software optimization software evaluation metrics

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Image Processor for Visual Prosthesis Based on ARM 7

Image Processor for Visual Prosthesis Based on ARM

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7th International Conference on Biomedical Engineering and Informatics (BMEI)

作者： Zhao, Lei Wu, Kaijie Chai, Xinyu Gu, Chaochen Shanghai Jiao Tong Univ Sch Biomed Engn Shanghai 200030 Peoples R China Shanghai Jiao Tong Univ Sch Elect Informat & Elect Engn Shanghai 200030 Peoples R China

ISBN: (纸本)9781479958382

Visual prosthesis is designed and developed to help the blind people to restore vision [1]. Image processor is an essential part of visual prosthesis. It receives image data from a camera, and fulfills specific image processing strategy to transfer image information to data forms that can be recognized by implanted stimulator. To extract useful information from original image and provide satisfying image processing ability are the basic requirements for the image processor. In this article, an image processor based on ARM Cortex-A9 processor running mobile operating system Android is introduced. Image processing algorithms such as edge detection are applied to provide vital information of the scene to the following components. software optimizations like using native code and hardware acceleration are made to reduce the processing time. After optimization, this image processor can process a 640*480 image within 50ms. This work could become the foundation of future researches to build visual prosthesis with impressive processing ability and flexibility.

关键词： Visual prosthesis Image processing strategy software optimization

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Efficient Implementation of the Graph-based SLAM on an OMAP Processor 13

Efficient Implementation of the Graph-based SLAM on an OMAP ...

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13th International Conference on Control Automation Robotics & Vision (ICARCV)

作者： Dine, Abdelhamid Elouardi, Abdelhafid Vincke, Bastien Bouaziz, Samir Univ Paris Sud Inst Elect Fondamentale F-91405 Orsay France CNRS 8622 F-91405 Orsay France

ISBN: (纸本)9781479951994

An autonomous robot has to localize itself in an unknown area. Simultaneous Localization and Mapping (SLAM) allows for a robot to build a map of an unknown environment and localize simultaneously itself on this map. Graph-based SLAM methods use a graph to represent and solve the SLAM problem. This paper presents an optimized implementation of the incremental 3D graph-based SLAM on an OMAP architecture used as open multimedia applications platform. This implementation uses an optimized data structure and an efficient memory access management to solve the nonlinear least squares problem related to the algorithm. It takes also advantage of the multi-core architecture to parallelize the algorithm. To evaluate our implementation, we will evaluate the processing times of the implemented algorithm compared to those of the well known framework g(2)o.

关键词： graph-based SLAM software optimization performances evaluation

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