This paper proposes a simple phase disposition modulation with sorting algorithm for three-phase cascaded multilevel converters. The sorting algorithm can be implemented entirely in software. The main features of the ...
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ISBN:
(纸本)9781479987801
This paper proposes a simple phase disposition modulation with sorting algorithm for three-phase cascaded multilevel converters. The sorting algorithm can be implemented entirely in software. The main features of the proposed modulation is a better distribution of PWM pulses, switching losses and DC bus current when compared with the conventional phase disposition (PD) modulation. In addition, it results in the nearest level PWM in the line-to-line output voltages leading to a smaller THD if compared with phase-shifted (PS) modulation. Simulation results are presented to demonstrate the good performance of the proposed algorithm.
This paper describes a fast integer sorting algorithm, herein referred to as Bit-index sort, which does not use comparisons and is intended to sort partial permutations. Experimental results exhibit linear complexity ...
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ISBN:
(纸本)9781467356121
This paper describes a fast integer sorting algorithm, herein referred to as Bit-index sort, which does not use comparisons and is intended to sort partial permutations. Experimental results exhibit linear complexity order in execution time. Bit-index sort uses a bit-array to classify input sequences of distinct integers, and exploits built-in bit functions in C compilers, supported by machine hardware, to retrieve the ordered output sequence. Results show that Bit-index sort outperforms quicksort and counting sort algorithms when compared in their execution time. A parallel approach for Bit-index sort using two simultaneous threads is also included, which obtains further speedups of up to 1.6 compared to its sequential case.
The modular multilevel converter is a suitable topology for bidirectional ac-dc conversion in high-voltage high-power applications. By connecting submodule circuits in series, a high-voltage waveform with excellent ha...
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ISBN:
(纸本)9781479904839
The modular multilevel converter is a suitable topology for bidirectional ac-dc conversion in high-voltage high-power applications. By connecting submodule circuits in series, a high-voltage waveform with excellent harmonic performance can be achieved with a very high efficiency and low switching frequency. The balancing of the capacitor voltages will, however, become increasingly difficult as the switching frequency is reduced. Although the capacitor voltages can be kept balanced over time even at the fundamental switching frequency, the spread and thus also the peak variation in the capacitor voltages will typically increase at lower switching frequencies. This paper presents a capacitor voltage balancing strategy which aims to combine a low switching frequency with a low capacitor voltage ripple. This is done by a predictive algorithm that calculates the amount of charge that must be stored in the submodule capacitors during the following fundamental frequency period. The converter is then controlled in such a way that the stored charge in the submodule capacitors is evenly distributed among all the submodules when the capacitor voltages reach their maximum values. In this way, it is possible to limit the peak voltage in the capacitor at switching frequencies as low as 2-3 times the fundamental frequency. The capacitor voltage balancing strategy is first validated by simulation results at 110 Hz switching frequency. It is observeved that when the proposed method is used, the capacitor voltage ripple is 35% lower compared to the case when a conventional sorting algorithm is used. The capacitor voltage balancing strategy is also validated experimentally at 130 Hz switching frequency. The experimental results show that it is possible to combine the proposed method with previously presented circulating-current control methods.
We propose a new way to perform distributed source coding by using sorting in coding and assignment for decoding. Specifically, sorting the symbols will separate information into values and positions. The decoder will...
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We propose a new way to perform distributed source coding by using sorting in coding and assignment for decoding. Specifically, sorting the symbols will separate information into values and positions. The decoder will use an assignment algorithm that exploits side information to try to recover the original positions of the symbols. For lossless decoding, we will show that the encoder only needs to send the minimum of position information to help modeling the assignment cost matrix. In addition, there are many ways to send this information, allowing new possibilities for implementing practical distributed coding. This technique also simplifies the modeling of probabilities and reduces the number of coding operations. Thus, we used it within the Stanford distributed video coding architecture and tested its practicality and efficiency. The video coding tests and results show that this idea can work, and its performance is similar to the existing distributed video coding techniques.
A regression testing algorithm based on greedy algorithmsorting weight is proposed to further improve the efficiency and effectiveness of software regression test. In view of the problems existing in the sorting of t...
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A regression testing algorithm based on greedy algorithmsorting weight is proposed to further improve the efficiency and effectiveness of software regression test. In view of the problems existing in the sorting of test cases of two greedy algorithms, a weight-based sorting strategy is proposed to further improve the rate and effectiveness of software testing. Simulation results show that compared with global greedy algorithm and additional greedy algorithm, the weight-based regression test prioritisation algorithm can improve the effectiveness of test results while ensuring shorter execution time and it has higher APFD values and better performance. Therefore, the weight-based regression software test prioritisation algorithm designed can improve the effectiveness of software program testing, and can be applied to the regression testing of software, with high feasibility.
Particle-in-cell (PIC) simulations with Monte-Carlo collisions are used in plasma science to explore a variety of kinetic effects. One major problem is the long run-time of such simulations. Even on modern computer sy...
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Particle-in-cell (PIC) simulations with Monte-Carlo collisions are used in plasma science to explore a variety of kinetic effects. One major problem is the long run-time of such simulations. Even on modern computer systems, PIC codes take a considerable amount of time for convergence. Most of the computations can be massively parallelized, since particles behave independently of each other within one time step. Current graphics processing units (GPUs) offer an attractive means for execution of the parallelized code. In this contribution we show a one-dimensional PIC code running on NVIDIA (R) GPUs using the CUDA (TM) environment. A distinctive feature of the code is that size of the cells that the code uses to sort the particles with respect to their coordinates is comparable to size of the grid cells used for discretization of the electric field. Hence, we call the corresponding algorithm "fine-sorting". Implementation details and optimization of the code are discussed and the speed-up compared to classical CPU approaches is computed. (C) 2011 Elsevier By. All rights reserved.
We present two fast algorithms for sorting on a linear array with a reconfigurable pipelined bus system (LARPBS), one of the recently proposed parallel architectures based on optical buses. In our first algorithm, we ...
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We present two fast algorithms for sorting on a linear array with a reconfigurable pipelined bus system (LARPBS), one of the recently proposed parallel architectures based on optical buses. In our first algorithm, we sort V numbers in O(log N log log N) worst-case time using N processors. In our second algorithm, we sort N numbers in O((log log N)(2)) worst-case time using N1+epsilon processors, for any fixed epsilon such that 0algorithms are based on a novel deterministic sampling scheme for merging two sorted arrays of length N each in O(log log N) time on an LARPBS with N processors. To our knowledge, the previous best sorting algorithm on this architecture has a running time of O ((log N)(2)) using N processors.
It is important to be able to derive different algorithms that meet a particular specification. Transformations on a program specification provide a systematic means for such an endeavour. Different transformations on...
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It is important to be able to derive different algorithms that meet a particular specification. Transformations on a program specification provide a systematic means for such an endeavour. Different transformations on a specification can yield new and alternative forms of invariants. These invariants, in turn, can provide the framework for the derivation of a variety of algorithms by the use of weakest precondition techniques. To demonstrate these ideas a number of well-known sorting algorithms are shown to be derivable from a single original program *** intelligent use of equivalent forms is the touchstone of logical insight(S. K. Langer).
In this paper, the traditional ant colony algorithm has a slow convergence rate for routing optimization of Mesh networks. A multi-path routing protocol based on improved ant colony algorithm, Fortified Ant protocol, ...
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In this paper, the traditional ant colony algorithm has a slow convergence rate for routing optimization of Mesh networks. A multi-path routing protocol based on improved ant colony algorithm, Fortified Ant protocol, is proposed. The protocol first adds a sorting algorithm based on the ant colony algorithm, and introduces the concept of elite ants to improve the speed of routing optimization. Secondly, this paper also studies the multipath transmission of self-organizing networks. The simulation results show that compared with ADOV, DSR and AOC routing algorithms, the algorithm can quickly find multiple paths with better quality, with fast convergence and overhead. Less advantage. (C) 2020 The Authors. Published by Elsevier B.V.
Boosting and Bagging are two kinds of important voting sorting algorithms. Boosting algorithm can generate multiple classifiers by serialization through adjustment of sample weight;Bagging can generate multiple classi...
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ISBN:
(纸本)9783037853191
Boosting and Bagging are two kinds of important voting sorting algorithms. Boosting algorithm can generate multiple classifiers by serialization through adjustment of sample weight;Bagging can generate multiple classifiers by parallelization. Different algorithms are composed of different loss and different integration mode, through integration of Bagging and Boosting algorithm and naive Bayes algorithm, the Bagging NB and Ada Boost NB algorithms are constructed. Through experiment contrast of UCI data set, the result shows Bagging NB algorithm is relatively stable, it can produce the sorting result superior than that of NB algorithm, AdaBoost NB algorithm is greatly affected by the singular value in data distribution, the result with foundation of NB algorithm is relatively poor on part of data set, and that might have negative influence on the classifier algorithm.
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