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Creating a Bi-Directional source-to-source compiler Using MDE Transformation Techniques: A Proof-of-Concept Using the General-Purpose Programming Languages COBOL and C++

Creating a Bi-Directional Source-to-Source Compiler Using MD...

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作者： Sebastian Blomberg Chalmers University of Technology

学位级别：硕士

In this thesis, we discuss how a bidirectional source-to-source compiler, for the declarative general-purpose languages COBOL and C++, can be implemented us- ing Model-Driven Engineering (MDE) tools and practices. The outcome of our work is primarily an approach for implementing said bidirectional compiler using formal grammars, bidirectional transformation languages, and a developed concept model. This approach also illustrates how a programmer's intent can be transferred between languages. In order to evaluate the approach, a prototype was realized using Ecore, Xtext, and Medini QVT. In the process, a library for emulation of COBOL data types in C++ was also developed. Finally, we conclude the success of the developed approach and prototype.

关键词： source-to-source compiler transpiler translator bidirectional transformation model-driven engineering COBOL data type emulation

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Open source Software Randomisation Framework for Probabilistic WCET Prediction on Multicore CPUs, GPUs and Accelerators 24th

Open Source Software Randomisation Framework for Probabilist...

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24th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation

作者： Kosmidis, Leonidas Maria Trompouki, Matina Lopez Castillon, Pau Rufart Blasco, Eric Fernandez Salgado, Javier Jung, Andreas Barcelona Supercomp Ctr BSC Barcelona Spain Univ Politecn Catalunya UPC Barcelona Spain European Space Agcy ESA Noordwijk Netherlands

ISBN: (纸本)9783031783791;9783031783807

High criticality space systems frequently have real-time requirements. Therefore, it is important to be able to compute the Worst Case Execution Time (WCET) of its software. However, with the complexity of modern processor architectures, it is very difficult to compute the WCET with traditional methods, such as static timing analysis or measurement based solutions. Recently, a novel timing analysis method was introduced, known as Measurement Based Probabilistic Timing Analysis (MBPTA). A unique characteristic of MBPTA compared to traditional methods is that it produces a Probabilistic WCET (pWCET) which instead of a single overestimated value is a curve that associates execution times with probabilities which can reach arbitrary low values (e.g. 10(-14)). MBPTA simplifies the estimation of pWCET by simply requiring the collection of execution times which are independent and identically distributed (i.i.d.). However, this property is not satisfied in conventional hardware and software systems. Special hardware designs have been proposed which provide hardware-based time-randomisation, including a probabilistic version of Cobham Gaisler's LEON3 as well as software solutions in the form of software randomisation. However, existing software randomisation methods only support CPUs, are very restrictive (i.e. support only ANSI C) and more importantly are not open source. This limits significantly the applicability of these methods in space, although ESA has supported in the past activities related to MBPTA hardware and software (P4S-PROARTIS for Space and EFL-Eviction Frequency Limitation). In this ESA-funded project, we implement an open source, qualifiable software randomisation tool which will be able to software randomise code for CPUs, including multicores as well as GPUs, which to our knowledge are not amenable to any WCET solution.

关键词： Real-time Systems Worst Cased Execution Time (WCET) Open source source-to-source compiler Measurement Based Probabilistic Timing Analysis (MBPTA) Software Randomisation

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Effects Dependence Graph: A Key Data Concept for C source-to-source compilers 16

Effects Dependence Graph: A Key Data Concept for C Source-to...

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16th IEEE International Working Conference on source Code Analysis and Manipulation (SCAM)

作者： Lossing, Nelson Guillou, Pierre Irigoin, Francois PSL Res Univ MINES ParisTech Paris France

ISBN: (纸本)9781509038497

Optimizations, transformations and analyses are applied to programs by compilers at the intermediate representation level, which usually does not include explicit variable declarations. This description level is fine for middle-ends and for source-to-source optimizers of simple languages. Meanwhile, the C language has become much more flexible since the C99 standard, and let variable and type declarations appear almost anywhere in source code. We present in this paper a new concept to manage C99 declarations in a source-to-source compiler: the Effects Dependence Graph, which is an extension of the classical Data Dependence Graph. It deals particularly efficiently with user-defined type declarations or dependent types like Variable-Length Array. It is also interesting because no legal scheduling transformation is hindered and because existing algorithms are either not or slightly modified. Finally it reduces the need for variable, struct and array privatization or live range analyses in automatic parallelizers. To the best of our knowledge, the declaration issue is ignored in the literature: existing C source-to-source compilers either do not support C99, or accept only restricted portions of code, and production compilers use low- level intermediate representations, possibly with annotations. In this way our solution addresses a wider range of compiler analysis issues.

关键词： C Language Data Dependence Graph Declaration Scheduling source-to-source compiler

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Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

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JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2023年第10期95卷 1219-1229页

作者： Bloch, Aurelien Casale-Brunet, Simone Mattavelli, Marco Ecole Polytech Fed Lausanne EPFL SCI STI MM Lausanne Switzerland

Dataflow programming is a methodology that enables the development of high-level, parametric programs that are independent of the underlying platform. This approach is particularly useful for heterogeneous platforms, as it eliminates the need to rewrite application software for each configuration. Instead, it only requires new low-level implementation code, which is typically automatically generated through code generation tools. The performance of programs running on heterogeneous parallel platforms is highly dependent on the partitioning and mapping of computation to different processing units. This is determined by parameters that govern the partitioning, mapping, scheduling, and allocation of data exchanges among the processing elements of the platform. Determining the appropriate parameters for a specific application and set of architectures is a complex task and is an active area of research. This paper presents a novel methodology for partitioning and mapping dataflow programs onto heterogeneous systems composed of both CPUs and GPUs. The objective is to identify the program configuration that provides the most efficient way to process a typical dataflow program by exploring its design space. This is an NP-complete problem that we have addressed by utilizing a design space exploration approach that leverages a Tabu search meta-heuristic optimization algorithm driven by analysis of the execution trace graph of the program. The heuristic algorithm effectively identifies a solution that maps actors to processing units while improving overall performance. The parameters of the heuristic algorithm, such as the time limit and the proportion of neighboring solutions explored during each iteration, can be fine-tuned for optimal results. Additionally, the proposed approach allows for the exploration of solutions that do not utilize all hardware resources if it results in better performance. The effectiveness of the proposed approach is demonstrated through experimenta

关键词： Heterogeneous systems GPU programming source-to-source compiler Parallel computing RVC-CAL Dynamic dataflow programs Design space exploration Tabu-search

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Flynn's Reconciliation: Automating the Register Cache Idiom for Cross-accelerator Programming

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ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION 2021年第3期18卷 1–26页

作者： Thuerck, Daniel Weber, Nicolas Bifulco, Roberto NEC Labs Europe Kurftirsten Anlage 36 Heidelberg Germany Tech Univ Darmstadt Darmstadt Germany

A large portion of the recent performance increase in the High Performance Computing (HPC) and Machine Learning (ML) domains is fueled by accelerator cards. Many popular ML frameworks support accelerators by organizing computations as a computational graph over a set of highly optimized, batched general-purpose kernels. While this approach simplifies the kernels' implementation for each individual accelerator, the increasing heterogeneity among accelerator architectures for HPC complicates the creation of portable and extensible libraries of such kernels. Therefore, using a generalization of the CUDA community's warp register cache programming idiom, we propose a new programming idiom (CoRe) and a virtual architecture model (PIRCH), abstracting over SIMD and SIMT paradigms. We define and automate the mapping process from a single source to PIRCH's intermediate representation and develop backends that issue code for three different architectures: Intel AVX512, NVIDIA GPUs, and NEC SX-Aurora. Code generated by our source-to-source compiler for batched kernels, borG, competes favorably with vendor-tuned libraries and is up to 2x faster than hand-tuned kernels across architectures.

关键词： Accelerated computing GPGPU warp-register cache batched kernels SIMT SIMD cross-architecture compilation source-to-source compiler

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hiCUDA: High-Level GPGPU Programming

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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 2011年第1期22卷 78-90页

作者： Han, Tianyi David Abdelrahman, Tarek S. Univ Toronto Edward S Rogers Sr Dept Elect & Comp Engn Toronto ON M5S 3G4 Canada

Graphics Processing Units (GPUs) have become a competitive accelerator for applications outside the graphics domain, mainly driven by the improvements in GPU programmability. Although the Compute Unified Device Architecture ( CUDA) is a simple C-like interface for programming NVIDIA GPUs, porting applications to CUDA remains a challenge to average programmers. In particular, CUDA places on the programmer the burden of packaging GPU code in separate functions, of explicitly managing data transfer between the host and GPU memories, and of manually optimizing the utilization of the GPU memory. Practical experience shows that the programmer needs to make significant code changes, often tedious and error-prone, before getting an optimized program. We have designed hiCUDA, a high-level directive-based language for CUDA programming. It allows programmers to perform these tedious tasks in a simpler manner and directly to the sequential code, thus speeding up the porting process. In this paper, we describe the hiCUDA directives as well as the design and implementation of a prototype compiler that translates a hiCUDA program to a CUDA program. Our compiler is able to support real-world applications that span multiple procedures and use dynamically allocated arrays. Experiments using nine CUDA benchmarks show that the simplicity hiCUDA provides comes at no expense to performance.

关键词： CUDA GPGPU data-parallel programming directive-based language source-to-source compiler

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A novel compiler support for automatic parallelization on multicore systems

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PARALLEL COMPUTING 2013年第9期39卷 442-460页

作者： Andion, Jose M. Arenaz, Manuel Rodriguez, Gabriel Tourino, Juan Univ A Coruna Dept Elect & Syst La Coruna 15071 Spain

The widespread use of multicore processors is not a consequence of significant advances in parallel programming. In contrast, multicore processors arise due to the complexity of building power-efficient, high-clock-rate, single-core chips. Automatic parallelization of sequential applications is the ideal solution for making parallel programming as easy as writing programs for sequential computers. However, automatic parallelization remains a grand challenge due to its need for complex program analysis and the existence of unknowns during compilation. This paper proposes a new method for converting a sequential application into a parallel counterpart that can be executed on current multicore processors. It hinges on an intermediate representation based on the concept of domain-independent kernel (e.g., assignment, reduction, recurrence). Such kernel-centric view hides the complexity of the implementation details, enabling the construction of the parallel version even when the source code of the sequential application contains different syntactic variations of the computations (e.g., pointers, arrays, complex control flows). Experiments that evaluate the effectiveness and performance of our approach with respect to state-of-the-art compilers are also presented. The benchmark suite consists of synthetic codes that represent common domain-independent kernels, dense/sparse linear algebra and image processing routines, and full-scale applications from SPEC CPU2000. (C) 2013 Elsevier B.V. All rights reserved.

关键词： Automatic parallelization Parallelizing compiler source-to-source compiler compiler intermediate representation Domain-independent kernel Multicore processor

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Automated Translation of Functional Big Data ∼eries to SQL

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PROCEEDINGS OF THE ACM ON PROGRAMMING LANGUAGES-PACMPL 2023年第OOPSLA期7卷 580-608页

作者： Zhang, Guoqiang Mariano, Benjamin Shen, Xipeng Dillig, Isil North Carolina State Univ Raleigh NC 27695 USA Univ Texas Austin Austin TX 78712 USA

Big data analytics frameworks like Apache Spark and Flink enable users to implement queries over large, distributed databases using functional APIs. In recent years, these APIs have grown in popularity because their functional interfaces abstract away much of the minutiae of distributed programming required by traditional query languages like SQL. However, the convenience of these APIs comes at a cost because functional queries are often less e similar to cient than their SQL counterparts. Motivated by this observation, we present a new technique for automatically transpiling functional queries to SQL. While our approach is based on the standard paradigm of counterexample-guided inductive synthesis, it uses a novel column-wise decomposition technique to split the synthesis task into smaller subquery synthesis problems. We have implemented this approach as a new tool called RDD2SQL for translating Spark RDD queries to SQL and empirically evaluate the e similar to ectiveness of RDD2SQL on a set of real-world RDD queries. Our results show that (1) most RDD queries can be translated to SQL, (2) our tool is very e similar to ective at automating this translation, and (3) performing this translation o similar to ers signi similar to cant performance bene similar to ts.

关键词： program synthesis source-to-source compiler query optimization

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Exploration of automatic optimisation for CUDA programming

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INTERNATIONAL JOURNAL OF PARALLEL EMERGENT AND DISTRIBUTED SYSTEMS 2015年第4期30卷 309-324页

作者： Al-Mouhamed, Mayez ul Hassan Khan, Ayaz King Fahd Univ Petr & Minerals Dept Comp Engn Dhahran Saudi Arabia

Writing optimised compute unified device architecture (CUDA) program for graphic processing units (GPUs) is complex even for experts. We present a design methodology for a restructuring tool that converts C-loops into optimised CUDA kernels based on a three-step algorithm which are loop tiling, coalesced memory access and resource optimisation. A method for finding possible loop tiling solutions with coalesced memory access is developed and a simplified algorithm for restructuring C-loops into an efficient CUDA kernel is presented. In the evaluation, we implement matrix multiply (MM), matrix transpose (M-transpose), matrix scaling (M-scaling) and matrix vector multiply (MV) using the proposed algorithm. We present the analysis of the execution time and GPU throughput for the above applications, which favourably compare to other proposals. Evaluation is carried out while scaling the problem size and running under a variety of kernel configurations. The obtained speedup is about 28-35% for M-transpose compared to NVIDIA Software Development Kit, 33% speedup for MV compared to general purpose computation on graphics processing unit compiler, and more than 80% speedup forMMand M-scaling compared to CUDA-lite.

关键词： CUDA GPU parallel programming compiler transformations directive-based language source-to-source compiler GPGPU

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Methodologies for Synthesizing and Analyzing Dynamic Dataflow Programs in Heterogeneous Systems for Edge Computing

IEEE OPEN JOURNAL OF CIRCUITS AND SYSTEMS

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IEEE OPEN JOURNAL OF CIRCUITS AND SYSTEMS 2021年 2卷 769-781页

作者： Bloch, Aurelien Casale-Brunet, Simone Mattavelli, Marco Ecole Polytech Fed Lausanne EPFL SCI STI MM CH-1015 Lausanne Switzerland

The possibility of using the increasing computing power available in cloud infrastructures requires the development of new approaches for application software development and optimization. Emerging edge computing paradigms offer the possibility of reducing bandwidth needs and of optimizing latency, features particularly relevant for Big Data applications, by bringing computation closer to the user and to the data generation processes. However, edge computing approaches pose several challenges in terms of how to be able to efficiently take advantage of a distributed network of heterogeneous processing nodes. This paper deals with this problem by extending a dynamic dataflow software development framework and related design flow tools to support heterogeneous platforms. The paper describes the methodology steps for the synthesis of application software executing on heterogeneous CPU/GPU co-processing nodes. The steps do include the optimization of the communication between heterogeneous processing elements, a technique for the efficient mapping and parallelization of computation on independent GPU partitions, and the introduction of dynamic programming approach for leveraging the SIMD nature of GPU computing. To complete the methodology of seamless porting of dataflow software and partition on CPU or GPU computing nodes, an automated methodology for exploring the configuration space and to identify high performance working points is developed.

关键词： Graphics processing units Estimation Tools Space exploration Performance analysis Dynamic programming Computational efficiency Edge computing dynamic dataflow programs RVC-CAL parallel computing SIMD source-to-source compiler GPU programming heterogeneous systems profiling performance estimation

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