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static data-flow analysis of UML/SysML Functional Views for Signal and Image Processing Applications 1

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7th International Conference on Model-Driven Engineering and Software Development (MODELSWARD)

作者： Enrici, Andrea Apvrille, Ludovic Pacalet, Renaud Pham, Minh Hiep Nokia Bell Labs F-91620 Nozay France Inst Polytech Paris LTCI Telecom Paris F-75013 Paris France

ISBN: (数字)9783030378738

ISBN: (纸本)9783030378738;9783030378721

The complexity of heterogeneous Multi-Processor Systems-on-Chip stretches the limits of software development solutions based on sequential languages such as C/C++. While these are still the most widely used languages in practice, model-based solutions appear to be an efficient alternative. However, the optimized compilation of models for multi-processor systems still presents many open research problems. Among others, static data-flow analyses for models require the adaptation of traditional algorithms used in program analysis (iterative and worklist algorithms). These algorithms operate on Control-flow Graphs with a unique start node (i.e., a node without predecessors) and assume that every basic block is reachable from this start node. In this paper, we present a novel combination of the well-known iterative and worklist algorithms that examines a Control-flow Graph where basic blocks can be reached by paths that originate from different start states. We apply this solution to functional views of signal and image processing models denoted with UML Activity and SysML Block diagrams. We demonstrate its effectiveness on interval analysis and show that significant reductions in the number of visits of the models' control-flow graphs can be achieved.

关键词： static data-flow analysis Optimizing model compilation UML/SysML Multi-Processor System-on-Chip

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Integrating static Analyses for High-Precision Control-flow Integrity 24

Integrating Static Analyses for High-Precision Control-Flow ...

引用

27th International Symposium on Research in Attacks, Intrusions and Defenses (RAID)

作者： Kasten, Florian Zieris, Philipp Horsch, Julian Fraunhofer AISEC Garching Germany

ISBN: (纸本)9798400709593

Memory corruptions are still one of the most prevalent and severe security vulnerabilities in today's programs. For this reason, several techniques for mitigating software vulnerabilities exist and are used in production systems. An important mitigation involves the prevention of invalid control flow transfers. Attackers often corrupt function pointers to subvert a forward-edge in a program's call graph. Forward-edges can be protected using Control-flow Integrity (CFI), for which practical implementations already exist. However, current CFI implementations are often imprecise, allowing more control flow transfers than necessary. This often leaves sufficient leeway for an attacker to successfully exploit a program. This paper presents High-Precision CFI (HPCFI), a concept and implementation for precise forward-edge CFI protection of indirect calls in C and C++ programs using a combination of type analysis and static data-flow analysis for determining valid forward-edges. HPCFI is implemented as LLVM compiler passes that perform a precise type analysis and utilize the static Value-flow (SVF) framework to conduct a static data-flowanalysis. The combination of type analysis and static data-flow analysis offers higher precision than conventional heuristic-based approaches. Our evaluation, using all compatible benchmarks from SPEC CPU 2017, demonstrates that HPCFI can be effectively applied to large projects with an average performance overhead of only 1.3%, while improving the precision of established CFI mechanisms, such as Clang CFI, by up to 99% and 40% on average.

关键词： Control-flow Integrity static data-flow analysis Whole-Program analysis Pointer analysis LLVM SVF Multi-Layer Type analysis

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Efficient data-flow analysis of UML/SysML Diagrams for Optimized Model Compilation of Hardware-software Systems 7th

Efficient Data-Flow Analysis of UML/SysML Diagrams for Optim...

引用

7th International Conference on Model-Driven Engineering and Software Development (MODELSWARD)

作者： Enrici, Andrea Apvrille, Ludovic Pacalet, Renaud Nokia Bell Labs Route Villejust F-91620 Nozay France Univ Paris Saclay Telecom ParisTech LTCI F-75013 Paris France

ISBN: (纸本)9789897583582

Growing needs in terms of latency, throughput and flexibility are driving the architectures of tomorrow's Radio Access Networks towards more centralized configurations that rely on cloud-computing paradigms. In these new architectures, digital signals are processed on a large variety of hardware units (e.g., CPUs, Field Programmable Gate Arrays, Graphical Processing Units). Optimizing model compilers that target these architectures must rely on efficient analysis techniques to optimally generate software for signal-processing applications. In this paper, we present a blocking combination of the iterative and worklist algorithms to perform static data-flow analysis on functional views denoted with UML Activity and SysML Block diagrams. We demonstrate the effectiveness of the blocking mechanism with reaching definition analysis of UML/SysML models for a 5G channel decoder (receiver side) and a Software Defined Radio system. We show that significant reductions in the number of unnecessary visits of the models' control-flow graphs are achieved, with respect to a non-blocking combination of the iterative and worklist algorithms.

关键词： Model-Driven Engineering static data-flow analysis UML SysML Optimizing Model Compilation

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