检索结果-内蒙古大学图书馆

Towards a heterogeneous simulation kernel for system-level models: A SystemC kernel for synchronous data flow models

引用

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2005年第8期24卷 1261-1271页

作者： Patel, HD Shukla, SK Virginia Polytech Inst & State Univ Dept Elect & Comp Engn Blacksburg VA 24061 USA

As SystemC gains popularity as a modeling language of choice for system-on-chip (SoC) designs, heterogeneous modeling in SystemC and efficient simulation become increasingly important. However, in the current reference implementation, all SystemC models are simulated through a nondeterministic discrete-event (DE) simulation kernel that schedules events at run time mimicking other models of computation (MoCs) using DE, which may get cumbersome. This sometimes results in too many delta cycles hindering the simulation performance of the model. SystemC also uses this simulation kernel as the target simulation engine. This makes it difficult to express different MoCs naturally in SystemC. In an SoC model, different components may need to be naturally expressible in different MoCs. These components may be amenable to static scheduling-based simulation or other presimulation optimization techniques. The goal is to create a simulation framework for heterogeneous SystemC models and to gain efficiency and ease of use within the framework of SystemC reference implementation. In this paper, a synchronous data flow (SDF) kernel extension for SystemC is introduced. Experimental results showing improvement in simulation time are also presented.

关键词： embedded system design heterogeneous models of computation simulation efficiency synchronous data flow SystemC

来源：评论

学校读者我要写书评

暂无评论

Compositionality in synchronous data flow: Modular Code Generation from Hierarchical SDF Graphs

引用

ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS 2013年第3期12卷 1-26页

作者： Tripakis, Stavros Bui, Dai Geilen, Marc Rodiers, Bert Lee, Edward A. Univ Calif Berkeley Dept Elect Engn & Comp Sci Berkeley CA 94720 USA Eindhoven Univ Technol Dept Elect Engn NL-5600 MB Eindhoven Netherlands

Hierarchical SDF models are not compositional: a composite SDF actor cannot be represented as an atomic SDF actor without loss of information that can lead to rate inconsistency or deadlock. Motivated by the need for incremental and modular code generation from hierarchical SDF models, we introduce in this paper DSSF profiles. DSSF (Deterministic SDF with Shared FIFOs) forms a compositional abstraction of composite actors that can be used for modular compilation. We provide algorithms for automatic synthesis of non-monolithic DSSF profiles of composite actors given DSSF profiles of their sub-actors. We show how different trade-offs can be explored when synthesizing such profiles, in terms of compactness (keeping the size of the generated DSSF profile small) versus reusability (maintaining necessary information to preserve rate consistency and deadlock-absence) as well as algorithmic complexity. We show that our method guarantees maximal reusability and report on a prototype implementation.

关键词： Algorithms Design Languages Embedded software hierarchy synchronous data flow code generation clustering

来源：评论

学校读者我要写书评

暂无评论

A Systematic Design Space Exploration of MPSoC Based on synchronous data flow Specification

引用

JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2010年第2期58卷 193-213页

作者： Lee, Choonseung Kim, Sungchan Ha, Soonhoi Seoul Natl Univ Sch Elect Engn & Comp Sci Seoul South Korea

The design space exploration (DSE) problem addressed in this paper is to find out Multi-Processor System-on-Chip architectures for a given multi-task signal processing application aiming to minimize the system cost while satisfying the real-time constraints. It involves the following three sub-problems: selecting processing elements, mapping an application to the processing elements, and determining the communication architecture. The proposed approach consists of two inner design loops: one is a cosynthesis loop that determines the selection of PEs and the mapping of a given application to the PEs, and the other is a communication architecture synthesis loop to find the hierarchical shared bus architecture. We specify an application with a synchronous data flow (SDF) model of computation that has well-matched semantics with the algorithmic function flow in DSP applications. To solve the problem, we need to compare the estimated performance of design points and choose the best ones. The common method of simulation-based performance estimation is too time-consuming to explore the wide design space. Thanks to the analytical properties of the SDF model, the performance estimation can be done without HW/SW cosimulation in both loops. A global feedback from the communication architecture synthesis step to the cosynthesis step forms the proposed DSE framework. We use a real-life application, 4-channel Digital Video Recorder (DVR) that is a multi-task example, as well as randomly generated graphs to show the viability of the proposed approach.

关键词： Multiprocessor system-on-chip Design space exploration Multitask multimedia application Real-time synchronous data flow Hardware-software partitioning Communication architecture exploration

来源：评论

学校读者我要写书评

暂无评论

STATIC SCHEDULING OF synchronous data flow PROGRAMS FOR DIGITAL SIGNAL-PROCESSING

引用

IEEE TRANSACTIONS ON COMPUTERS 1987年第1期36卷 24-35页

作者： LEE, EA MESSERSCHMITT, DG Department of Electrical Engineering and Computer Science University of California Berkeley CA 94720.

Large grain data flow (LGDF) programming is natural and convenient for describing digital signal processing (DSP) systems, but its runtime overhead is costly in real time or cost-sensitive applications. In some situations, designers are not willing to squander computing resources for the sake of programmer convenience. This is particularly true when the target machine is a programmable DSP chip. However, the runtime overhead inherent in most LGDF implementations is not required for most signal processing systems because such systems are mostly synchronous (in the DSP sense). synchronous data flow (SDF) differs from traditional data flow in that the amount of data produced and consumed by a data flow node is specified a priori for each input and output. This is equivalent to specifying the relative sample rates in signal processing system. This means that the scheduling of SDF nodes need not be done at runtime, but can be done at compile time (statically), so the runtime overhead evaporates. The sample rates can all be different, which is not true of most current data-driven digital signal processing programming methodologies. synchronous data flow is closely related to computation graphs, a special case of Petri nets. This self-contained paper develops the theory necessary to statically schedule SDF programs on single or multiple processors. A class of static (compile time) scheduling algorithms is proven valid, and specific algorithms are given for scheduling SDF systems onto single or multiple processors.

关键词： Block diagram Petri nets computation graphs data flow digital signal processing hard real-time systems multiprocessing static scheduling synchronous data flow

来源：评论

学校读者我要写书评

暂无评论

VSDF - synchronous data flow FOR VLSI

VSDF - SYNCHRONOUS DATA FLOW FOR VLSI

引用

37th Midwest Symposium on Circuits and Systems

作者： KERIHUEL, A MCCONNELL, R RAJOPADHYE, S IRISA F-35042 RENNESFRANCE

ISBN: (纸本)0780324285

This article describes a modified synchronous data flow model which is suitable for modeling synchronous VLSI circuits. The target model takes advantage of the synchronous nature of the operations to eliminate buffering between circuits where possible. We introduce a temporal notation, and define relevant functions to constructing a system.

关键词： DIGITAL SIGNAL PROCESSING synchronous data flow VLSI SIMULATION

来源：评论

学校读者我要写书评

暂无评论

On-Line synchronous Total Purely Functional data-flow Programming on the Java Virtual Machine with Sig 15

On-Line Synchronous Total Purely Functional Data-Flow Progra...

引用

Proceedings of the Principles and Practices of Programming on The Java Platform

作者： Baltasar Trancón Widemann Markus Lepper Ilmenau University of Technology Ehrenbergstraße 29 98693 Ilmenau Germany semantics GmbH Berlin Germany

ISBN: (纸本)9781450337120

Sig is the prototype of a purely declarative programming language and system for the processing of discrete, clocked synchronous, potentially real-time data streams. It aspires to combine good static safety, scalability and platform independence, with semantics that are precise, concise and suitable for domain experts. Its semantical and operational core has been formalized. Here we discuss the general strategy for making Sig programs executable, and describe the current state of a prototype compiler. The compiler is implemented in Java and targets the JVM. By careful cooperation with the JVM just-in-time compiler, it provides immediate executability in a simple and quickly extensible runtime environment, with code performance suitable for moderate real-time applications such as interactive audio synthesis.

关键词： synchronous data flow Functional language

来源：评论

学校读者我要写书评

暂无评论

Contract-based verification of discrete-time multi-rate Simulink models

引用

SOFTWARE AND SYSTEMS MODELING 2016年第4期15卷 1141-1161页

作者： Bostrom, Pontus Wiik, Jonatan Abo Akad Univ Dept Informat Technol Turku Finland

This paper presents an approach to modular contract-based verification of discrete-time multi-rate Simulink models. The verification approach uses a translation of Simulink models to sequential programs that can then be verified using traditional software verification techniques. Automatic generation of the proof obligations needed for verification of correctness with respect to contracts, and automatic proofs are also discussed. Furthermore, the paper provides detailed discussions about the correctness of each step in the verification process. The verification approach is demonstrated on a case study involving control software for prevention of pressure peaks in hydraulics systems.

关键词： Automated verification Refinement Control systems SMT solving synchronous data flow

来源：评论

学校读者我要写书评

暂无评论

Prototyping of VLSI components from a formal specification

引用

JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 1996年第2期12卷 177-186页

作者： McConnell, R Lavenier, D INST RECH INFORMAT & SYST ALEATOIRES F-35042 RENNES FRANCE

A trajectory from formal specification to component is presented, which can be used to prototype applications which combine off-the-shelf components and custom hardware, provided they meet the constraints of synchronous data flow. The formal specification allows one to prove that custom components will be correctly synchronized in a system context. VLSI synchronous data flow is introduced, the constraints it imposes are elaborated, and functions relevant to constructing a system are defined. Then, a component for motion video coding in VHDL is developed and synthesized, starting from a formal specification.

关键词： VLSI synchronous data flow formal specification

来源：评论

学校读者我要写书评

暂无评论

Look Into Details: The Benefits of Fine-Grain Streaming Buffer Analysis 10

Look Into Details: The Benefits of Fine-Grain Streaming Buff...

引用

ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tool for Embedded Systems

作者： Foroozannejad, Mohammad H. Hashemi, Matin Hodges, Trevor L. Ghiasi, Soheil Univ Calif Davis Dept Elect & Comp Engn Davis CA 95616 USA

ISBN: (纸本)9781605589534

Many embedded applications demand processing of a seemingly endless stream of input data in realtime. Productive development of such applications is typically carried out by synthesizing software from high-level specifications, such as dataflow graphs. In this context, we study the problem of inter-actor buffer allocation, which is a critical step during compilation of streaming applications. We argue that fine-grain analysis of buffers' spatio-temporal characteristics, as opposed to conventional live range analysis, enables dramatic improvements in buffer sharing. Improved sharing translates to reduction of the compiled binary memory footprint, which is of prime concern in many embedded systems. We transform the buffer allocation problem to two-dimensional packing using complex polygons. We develop an evolutionary packing algorithm, which readily yields buffer allocations. Experimental results show an average of over 7X and 2X improvement in total buffer size, compared to baseline and conventional live range analysis schemes, respectively.

关键词： Streaming applications Software synthesis synchronous data flow Buffer management Optimization

来源：评论

学校读者我要写书评

暂无评论

HETEROGENEOUS MULTIPROCESSOR MAPPING FOR REAL-TIME STREAMING SYSTEMS

HETEROGENEOUS MULTIPROCESSOR MAPPING FOR REAL-TIME STREAMING...

引用

IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Lin, Jing Srivatsa, Akshaya Gerstlauer, Andreas Evans, Brian L. Univ Texas Austin Austin TX 78712 USA

ISBN: (纸本)9781457705397

Real-time streaming signal processing systems typically desire high throughput and low latency. Many such systems can be modeled as synchronous data flow graphs. In this paper, we address the problem of multi-objective mapping of SDF graphs onto heterogeneous multi-processor platforms. The primary contributions include (1) an integer linear programming (ILP) model that globally optimizes throughput, latency and cost;(2) a low-complexity two-stage heuristic based on a combination of an evolutionary algorithm with an ILP to generate either a single sub-optimal mapping solution or a Pareto front for design space optimization. In our simulations, the proposed heuristic shows a 10(-6) gap from the ILP optimal solution, with up to 12x better run-time efficiency.

关键词： synchronous data flow streaming heterogenous multiprocessor mapping scheduling

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：