Limited search trellis decoding algorithms have great potentials of realizing low power due to their largely reduced computational complexity compared with the widely used Viterbi algorithm. However, because of the la...
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Limited search trellis decoding algorithms have great potentials of realizing low power due to their largely reduced computational complexity compared with the widely used Viterbi algorithm. However, because of the lack of operational parallelism and regularity in their original formulations, the limited search decoding algorithms have been traditionally ruled out for applications demanding very high throughput. We believe that, through appropriate algorithm and hardware architecture co-design, certain limited search trellis decoding algorithms can become serious competitors to the Viterbi algorithm for high-throughout applications. Focusing on the well-known t-algorithm, this paper presents techniques atthe algorithm and VLSI architecture levels to design fully parallel t-algorithm limited search trellis decoders. We first develop a modified t-algorithm, called SPEC-t, to improve the algorithmic parallelism. then, based on the conventional state-parallel register exchange Viterbi decoder, we develop a parallel SPEC-t decoder architecture that can effectively transform, the reduced computational complexity atthe algorithm level to the reduced switching activities in the hardware. We demonstrate the effectiveness of the SPEC-t design solution in the context of convolutional code decoding. Compared with state-parallel register exchange Viterbi decoders, the SPEC-t convolutional code decoders can achieve almostthe same throughput and decoding performance, while realizing up to 56% power savings. For the firsttime, this work provides an approach to exploitthe low power potential of the t-algorithm in very high throughput applications.
A concatenated decoder mainly composed of depunctured Viterbi decoder, convolutional deinterleaver, and Reed-Solomon decoder is presented in this paper. It has very widely applications in DVB, HDtV and satellite commu...
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ISBN:
(纸本)0780379845
A concatenated decoder mainly composed of depunctured Viterbi decoder, convolutional deinterleaver, and Reed-Solomon decoder is presented in this paper. It has very widely applications in DVB, HDtV and satellite communication systems. In the convolutional interleaver, an over-clocking scheme is employed to guarantee the speed limits. the algorithms of Viterbi decoder and RS decoder are modified t-algorithrn and modified Euclidean algorithm, respectively. Furthermore, the finite field multipliers and inversion over composite fields was adapted to optimize area and power in RS decoder, which reduced the area near to 25% compared to the conventional finite fields. the proposed concatenated decoder has about 81,000 gates except RAM model, which implemented in 100MHz using 0.25um CMOS process.
Space-time trellis codes (SttCs) combine channel coding and multiple-input multiple-output (MIMO) techniques to provide coding and diversity gains for wireless communication systems. the decoding complexity is extreme...
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ISBN:
(纸本)9781467368537
Space-time trellis codes (SttCs) combine channel coding and multiple-input multiple-output (MIMO) techniques to provide coding and diversity gains for wireless communication systems. the decoding complexity is extremely high because of the high density of branch metric calculations. thus, this study presents a state-purging mechanism based on the t-algorithmto reduce the computational complexity. In the proposed mechanism, an embedded code-aided (CA) signal-to-noise (SNR) estimator provides the SNR information to determine the optimal threshold based on the count of metric normalization. the state-purging mechanism greatly reduces the complexity of branch metric calculations and produces only negligible coding gain degradation. the fabricated 4 x 4 SttC MIMO detector using 90 nm 1P9M CMOS technology reduces 17.62%, 15.81%, and 13.45% power consumptions for QPSK, 8PSK, 16QAM modulations, respectively, when SNR is 20 dB.
this paper identifies the distributed simulation synchronization problem with a mathematical programming problem and examines synchronization algorithms from this standpoint.
this paper identifies the distributed simulation synchronization problem with a mathematical programming problem and examines synchronization algorithms from this standpoint.
In recent years, domestic folk sports research has became the one of the hottesttopics in our country. Folk sports, just as the name implies, which is created by the masses, inherited by the people, apparently it’s ...
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ISBN:
(纸本)9781629939919
In recent years, domestic folk sports research has became the one of the hottesttopics in our country. Folk sports, just as the name implies, which is created by the masses, inherited by the people, apparently it’s a traditional sports cultural movement in People's Daily life. On the one hand, it is a kind of sports, but on the other hand, it is also a kind of culture. At present research on the characteristics of domestic folk sports culture in our country is still staying on the surface of an overview of words, the depth of the characteristics research is just a superficial one. this paper adopted the SWOt analysis method and structural equation to study the local folk sports culture, attempted to have a vivid description in the form of change in depth. then make sure people can have a transparent understanding of the folk sports culture. Atthe same time encouraged people pay more attention on the folk sports culture in the information age. In order to solve inheritance problem and domestic folk sports culture develop problem in the perennial history of the domestic folk sports culture ,it also improve the domestic people's sports culture quality, and contribute to showing the world with splendid Chinese national characteristics of folk sports culture.
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