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task graph offloading via deep reinforcement learning in mobile edge computing

FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE 2024年 158卷 545-555页

作者： Liu, Jiagang Mi, Yun Zhang, Xinyu Li, Xiaocui Hunan Inst Technol Sch Comp Sci & Engn Hengyang Hunan Peoples R China Hunan Univ Technol & Business Xiangjiang Lab Changsha Peoples R China

Various mobile applications that comprise dependent tasks are gaining widespread popularity and are increasingly complex. These applications often have low-latency requirements, resulting in a significant surge in demand for computing resources. With the emergence of mobile edge computing (MEC), it becomes the most significant issue to offload the application tasks onto small-scale devices deployed at the edge of the mobile network for obtaining a high-quality user experience. However, since the environment of MEC is dynamic, most existing works focusing on task graph offloading, which rely heavily on expert knowledge or accurate analytical models, fail to fully adapt to such environmental changes, resulting in the reduction of user experience. This paper investigates the task graph offloading in MEC, considering the time-varying computation capabilities of edge computing devices. To adapt to environmental changes, we model the task graph scheduling for computation offloading as a Markov Decision Process (MDP). Then, we design a deep reinforcement learning algorithm (SATA-DRL) to learn the task scheduling strategy from the interaction with the environment, to improve user experience. Extensive simulations validate that SATA-DRL is superior to existing strategies in terms of reducing average makespan and deadline violation.

关键词： Mobile edge computing task graph Computation offloading Reinforcement learning

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A prefetch-aware scheduling for FPGA-based multi-task graph systems

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JOURNAL OF SUPERCOMPUTING 2020年第9期76卷 7140-7160页

作者： Ramezani, Reza Univ Isfahan Fac Comp Engn Dept Software Engn Esfahan Iran

In partially run-time reconfigurable (PRR) FPGAs, hardware tasks should be configured before their execution. The configuration delay imposed by the reconfiguration process increases the total execution time of the hardware tasks and task graphs. In this paper, a new technique namedforefront-fetchis presented to improve the makespan of hardware task graphs running on PRR FPGAs via alleviating the adverse effects of the configuration delays. In this technique, which is applied to a sequence of task graphs, the configuration of some tasks is carried out within the execution phase of the previous task graph. This strategy leads to hide the configuration delay of the forefront-fetched tasks that as a result improves the execution time. The proposed solution modifies the schedules of the task graphs at design time to obtain a set of schedule pairs for the run-time environment. Experiments on actual and synthesized task graphs demonstrate the ability of the proposed technique in improving the makespan of hardware task graphs. The obtained results show that for a set of task graphs running on Xilinx (TM) Virtex-5 XUPV5LX110T FPGA, makespan is improved by 37.81% on average. Moreover, the proposed solution outperforms state-of-the-art prefetch-aware scheduling strategies by 14.78% makespan improvement.

关键词： Execution time Makespan task graph FPGA Scheduling Forefront-fetch Prefetch

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task graph pre-scheduling, using Nash equilibrium in game theory

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JOURNAL OF SUPERCOMPUTING 2013年第1期64卷 177-203页

作者： Abdeyazdan, Marjan Parsa, Saeed Rahmani, Amir Masoud Islamic Azad Univ Sci & Res Branch Dept Comp Engn Tehran Iran Iran Univ Sci & Technol Dept Comp Engn Tehran Iran

Prescheduling algorithms are targeted at restructuring of task graphs for optimal scheduling. task graph scheduling is a NP-complete problem. This article offers a prescheduling algorithm for tasks to be executed on the networks of homogeneous processors. The proposed algorithm merges tasks to minimize their earliest start time while reducing the overall completion time. To this end, considering each task as a player attempting to reduce its earliest time as much as possible, we have applied the idea of Nash equilibrium in game theory to determine the most appropriate merging. Also, considering each level of a task graph as a player, seeking for distinct parallel processors to execute each of its independent tasks in parallel with the others, the idea of Nash equilibrium in game theory can be applied to determine the appropriate number of processors in a way that the overall idle time of the processors is minimized and the throughput is maximized. The communication delay will be explicitly considered in the comparisons. Our experiments with a number of known benchmarks task graphs and also two well-known problems of linear algebra, LU decomposition and Gauss-Jordan elimination, demonstrate the distinguished scheduling results provided by applying our algorithm. In our study, we consider ten scheduling algorithms: min-min, chaining, A (au), genetic algorithms, simulated annealing, tabu search, HLFET, ISH, DSH with task duplication, and our proposed algorithm (PSGT).

关键词： Prescheduling Scheduling task graph Game theory Nash equilibrium

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A Hybrid task graph Scheduler for High Performance Image Processing Workflows

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JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2017年第3期89卷 457-467页

作者： Blattner, Timothy Keyrouz, Walid Bhattacharyya, Shuvra S. Halem, Milton Brady, Mary NIST Informat Technol Lab Gaithersburg MD 20899 USA Univ Maryland Baltimore Cty Ctr Hybrid Multicore Prod Res Baltimore MD 21250 USA Univ Maryland Dept Elect & Comp Engn College Pk MD 20742 USA Tampere Univ Technol Dept Pervas Comp Tampere Finland

Designing applications for scalability is key to improving their performance in hybrid and cluster computing. Scheduling code to utilize parallelism is difficult, particularly when dealing with data dependencies, memory management, data motion, and processor occupancy. The Hybrid task graph Scheduler (HTGS) improves programmer productivity when implementing hybrid workflows for multi-core and multi-GPU systems. The Hybrid task graph Scheduler (HTGS) is an abstract execution model, framework, and API that increases programmer productivity when implementing hybrid workflows for such systems. HTGS manages dependencies between tasks, represents CPU and GPU memories independently, overlaps computations with disk I/O and memory transfers, keeps multiple GPUs occupied, and uses all available compute resources. Through these abstractions, data motion and memory are explicit;this makes data locality decisions more accessible. To demonstrate the HTGS application program interface (API), we present implementations of two example algorithms: (1) a matrix multiplication that shows how easily task graphs can be used;and (2) a hybrid implementation of microscopy image stitching that reduces code size by ae 43% compared to a manually coded hybrid workflow implementation and showcases the minimal overhead of task graphs in HTGS. Both of the HTGS-based implementations show good performance. In image stitching the HTGS implementation achieves similar performance to the hybrid workflow implementation. Matrix multiplication with HTGS achieves 1.3x and 1.8x speedup over the multi-threaded OpenBLAS library for 16k x 16k and 32k x 32k size matrices, respectively.

关键词： Heterogeneous architectures task graph Hybrid workflows Dataflow Image processing Matrix multiplication

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graph Few-Shot Learning via Restructuring task graph

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IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS 2022年第1期35卷 1415页

作者： Zhao, Feng Huang, Tiancheng Wang, Donglin Zhejiang Univ Coll Comp Sci & Technol Hangzhou 310024 Peoples R China Westlake Univ Sch Engn Machine Intelligence Lab MiLAB Hangzhou 310024 Peoples R China

Existing graph few-shot learning (FSL) methods usually train a model on many task graphs and transfer the learned model to a new task graph. However, the task graphs often contain a great number of isolated nodes, which results in the severe deficiency of learned node embeddings. Furthermore, in the training process, the neglect of task information also constrains the model's expressive ability. In this brief, we propose a novel metric-based graph few-shot learning approach via restructuring task graph (GFL-RTG). To solve the problems above, we innovatively restructure the task graph by adding class nodes and a task node to the original individual task graph. We first add class nodes and determine the connectivity between class nodes and others via their similarity. Then, we utilize a graph pooling network to learn a task embedding, which is regarded as a task node. Finally, the new task graph is restructured by combining class nodes, task node, and original nodes, which is then used as input to the metric-based graph neural network (GNN) to conduct few-shot learning. Our extensive experiments on three graph-structured datasets demonstrate that our proposed method generally outperforms the state-of-the-art baselines in few-shot learning.

关键词： task analysis Training Learning systems Testing Prototypes Message passing graph neural networks Aggregation class node graph few-shot learning (FSL) graph neural networks (GNNs) node classification task graph task node

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A standard task graph set for fair evaluation of multiprocessor scheduling algorithms

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JOURNAL OF SCHEDULING 2002年第5期5卷 379-394页

作者： Tobita, T Kasahara, H Waseda Univ Dept Elect Elect & Comp Engn Shinjuku Ku Tokyo 1698555 Japan

A 'standard task graph set' is proposed for fair evaluation of multiprocessor scheduling algorithms. Developers of multiprocessor scheduling algorithms usually evaluate them using randomly generated task graphs. This makes it difficult to compare the performance of algorithms developed in different research groups. To make it possible to evaluate algorithms under the same conditions so that their performances can be compared fairly, this paper proposes a standard task graph set covering many of the proposed task graph generation methods. This paper also evaluates as examples two heuristic algorithms (CP and CP/MISF), a practical sequential optimization algorithm (DF/IHS), and a practical parallel optimization algorithm (PDF/IHS) using the proposed standard task graph set. This set is available at http://***/schedule/. Copyright (C) 2002 John Wiley Sons, Ltd.

关键词： multiprocessor scheduling task graph performance evaluation benchmark optimization

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task graph Based System Partitioning for Multirate Integration 16

Task Graph Based System Partitioning for Multirate Integrati...

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7th International Workshop on Equation-Based Object-Oriented Modeling Languages and Tools (EOOLT)

作者： Waurich, Volker Flehmig, Martin Tech Univ Dresden Chair Construct Machines Dresden Germany Tech Univ Dresden Ctr Informat Serv & High Performance Comp Dresden Germany

ISBN: (纸本)9781450342025

Models with loosely coupled subsystems and network models are often characterised by subsystems of different dynamics. Therefore, mulirate methods have been brought into the LOOLT community over the last couple of years. These methods split the system into a fast and a slow part and integrate them using different step sizes to obtain faster simulations. Resides the numerical properties of multirate methods, an important challenge is to divide the system into a manageable number of subpartitions which can be assigned to a suitable step size. Tills paper presents a promi approach towards system partitioning for mull irate integration that is based on a systems task graph. The proposed algorithms and the guard mechanism aim to reduce the overhead of the multirate method which is introduced by deciding between active and latent variables at simulation execution time.

关键词： task graph multirate modelica ordinary differential equations object-oriented modelling

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Multi-Domain Dialogue State Tracking with Hierarchical task graph

Multi-Domain Dialogue State Tracking with Hierarchical Task ...

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International Joint Conference on Neural Networks (IJCNN) held as part of the IEEE World Congress on Computational Intelligence (IEEE WCCI)

作者： Shen, Tianhao Wang, Xiaojie Beijing Univ Posts & Telecommun Sch Comp Sci Beijing Peoples R China

ISBN: (纸本)9781728169262

Multi-domain dialogue state tracking (DST), which tracks user goals and intentions across multiple domains, is a core task for multi-domain task-oriented dialogue system. Previous works in multi-domain DST focus on the open-vocabulary setting to alleviate the over-dependence on pre-defined ontology. However, they come up short of modeling the relationships among domains and slots in an explicit and efficient way. In this paper, we propose a multi-domain dialogue state tracker with hierarchical task graph (DST-HTG) to address the above issues. DST-HTG uses a copy mechanism to perform DST under the open-vocabulary setting, which makes our model eliminate the dependence on pre-defined full ontology. Moreover, we extend our DST model with a hierarchical task graph which has simple structure and rich semantic information to incorporate the relationships among domains and slots into DST process explicitly and efficiently. Empirical results show that DST-HTG achieves the state-of-the-art joint goal accuracy and slot accuracy in MultiWOZ 2.0, a recently proposed multi-domain task-oriented dialogue dataset, which indicates the effectiveness of our proposed model.

关键词： natural language processing task-oriented dialogue systems multi-domain dialogue state tracking task graph

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A comparison of the static task graph scheduling algorithms

A comparison of the static task graph scheduling algorithms

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23rd International Conference on Information Technology Interfaces (ITI 2001)

作者： Brest, J Zumer, V Univ Maribor Fac Elect Engn & Comp Sci Maribor Slovenia

In this paper the new algorithm for the static task graph scheduling on multiprocessor systems is proposed and the comparison with two algorithms known from the literature is presented. The comparison of the algorithm... 详细信息

ISBN: (纸本)9539676932

关键词： parallel processing task graph list scheduling processor allocation

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Profiling-based task graph Extraction on Multiprocessor System-on-Chip

Profiling-based Task Graph Extraction on Multiprocessor Syst...

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IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

作者： Han, Sodam Yun, Yonghee Kim, Young Hwan Pohang Univ Sci & Technol Dept Elect Engn Pohang Gyeongbuk South Korea

ISBN: (纸本)9781509015702

This paper proposes a profiling-based method to extract a task graph, which describes the system behavior of a multiprocessor system-on-chip with Android OS. The proposed method computes the resource usage of each task and extracts dependency among tasks using the run-time system profiling results. The proposed method calculates CPU resource usage and I/O waiting time of each task by analyzing CPU scheduling and frequency logs. Also, the proposed method extracts the intra-process task dependency using the log of wakeup operations, and extracts the inter-process task dependency using the log of binder transactions. The proposed method describes system behavior without using the source code of the scenarios running on the MPSoC, has low intrusiveness, and guarantees the extraction of thread-level parallelism.

关键词： MPSoC Android task graph task dependency system resource system behavior

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