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检索条件"主题词=Test algorithm"
37 条 记 录,以下是1-10 订阅
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Fault Modeling and test algorithm Development Framework for Gate-All-Around SRAMs
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IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY 2025年 第1期25卷 37-44页
作者: Ghukasyan, Artur Amirkhanyan, Karen Tshagharyan, Grigor Harutyunyan, Gurgen Zorian, Yervant Synopsys Armenia CJSC Yerevan 0038 Armenia Synopsys Inc Sunnyvale CA 94085 USA
With the transition from planar to three-dimensional transistor architectures, many new factors have entered the scene, highlighting the need for thorough investigation of ever-shrinking technology nodes, as well as t... 详细信息
来源: 评论
Interleaving test algorithm for Subthreshold Leakage-Current Defects in DRAM Considering the Equal Bit Line Stress
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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 2014年 第4期22卷 803-812页
作者: Shin, Hyoyoung Park, Youngkyu Lee, Gihwa Park, Jungsik Kang, Sungho Yonsei Univ Dept Elect & Elect Engn Seoul 120749 South Korea Hynix Semicond Inc Mfg Div Gyounggi Do 467701 South Korea
Since the minimum feature size of dynamic RAM has been down-scaled, several studies have been carried out to determine ways to protect cell data from leakage current in many areas. In the field of testing, more approp... 详细信息
来源: 评论
New stability test algorithm for two-dimensional digital filters
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 1998年 第7期45卷 739-741页
作者: Yang, X Unbehauen, R No Jiao Tong Univ Inst Informat Sci Beijing 100044 Peoples R China Univ Erlangen Nurnberg Lehrstuhl Allgemeine & Theoret Elektrotech D-91058 Erlangen Germany
A new stability test algorithm for two-dimensional (2-D) digital filters is proposed, which uses the inner term polynomials of the corresponding 2-D test polynomial to construct a test table in order to simplify the s... 详细信息
来源: 评论
Fault Modeling and test algorithm Creation Strategy for FinFET-Based Memories
Fault Modeling and Test Algorithm Creation Strategy for FinF...
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IEEE 32nd VLSI test SYMPOSIUM (VTS)
作者: Harutyunyan, G. Tshagharyan, G. Vardanian, V. Zorian, Y. Synopsys|c|
FinFET transistors are playing an important role in modern technology that is rapidly growing. Embedded memories based on FinFET transistors lead to new defects that can require new embedded test and repair solution. ... 详细信息
来源: 评论
The performance advancement of test algorithm using neural network for semiconductor packages
The performance advancement of test algorithm using neural n...
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5th International Conference on Fracture and Strength of Solids/2nd International Conference on Physics and Chemistry of Fracture and Failure Prevention
作者: Kim, JY Sim, JK Song, MJ Kim, CH Kwac, LK Chosun Univ Dept Mechatron Engn Kwangju 501759 South Korea Gwangju Hlth Coll Dept Med Informat Engn Kwangju 506710 South Korea Chosun Univ Grad Sch Dept Precis Mech Engn Kwangju 501759 South Korea
Availability of defect test algorithm that recognizes exact and standardized defect information in order to fundamentally resolve generated defects in industrial sites by giving artificial intelligence to SAT(Scanning... 详细信息
来源: 评论
Development of a test algorithm and Evaluation of the Properties of a Metal-Cladding Additive
Development of a Test Algorithm and Evaluation of the Proper...
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Conference on Intelligent Technologies and Electronic Devices in Vehicle and Road Transport Complex (TIRVED)
作者: Gaidar, S. M. Ershov, V. S. Karelina, M. Yu Akulov, A. A. Russian State Agr Univ Moscow Timiryazev Agr Acad Moscow Russia Moscow Automobile & Rd Construct State Tech Univ Moscow Russia
This article discusses the problems of using compositions to increase the durability of friction units of power plants with the use of metal-cladding additives, as well as through the constant enrichment of engine oil... 详细信息
来源: 评论
Design of combinatorial test algorithm for memory fault diagnosis  8
Design of combinatorial test algorithm for memory fault diag...
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8th International Conference on Instrumentation and Measurement, Computer, Communication and Control (IMCCC)
作者: Zhang Dayu Wang Yue Wang He Zhang Song Jiang Chengzhi China Acad Space Technol Beijing Peoples R China
The memory device used in high reliability field of aerospace needs fast fault diagnosis and location when function failure occurs, but simple function verification test can not even detect failure due to low fault co... 详细信息
来源: 评论
An effective test and diagnosis algorithm for dual-port memories
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ETRI JOURNAL 2008年 第4期30卷 555-564页
作者: Park, Youngkyu Yang, Myung-Hoon Kim, Yongjoon Lee, Dae-Yeal Kang, Sungho Yonsei Univ Dept Elect & Elect Engn Seoul 120749 South Korea
This paper proposes a test algorithm that can detect and diagnose all the faults occurring in dual-port memories that can be accessed simultaneously through two ports. In this paper, we develop a new diagnosis algorit... 详细信息
来源: 评论
BIST-Based Fault Diagnosis for PCM With Enhanced test Scheme and Fault-Free Region Finding algorithm
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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 2020年 第7期28卷 1652-1664页
作者: Xie, Chenchen Li, Xi Lei, Yu Chen, Houpeng Wang, Qian Guo, Jiashu Miao, Jie Lv, Yi Song, Zhitang Chinese Acad Sci Shanghai Inst Microsyst & Informat Technol State Key Lab Funct Mat Informat Shanghai 200050 Peoples R China Univ Chinese Acad Sci Beijing 100049 Peoples R China Shanghai Technol Dev & Entrepreneurship Platform Shanghai 20090 Peoples R China AI SoC Shanghai 20090 Peoples R China
As one of the most promising candidates for nonvolatile memory, phase change memory (PCM) technology has shown great performance advantages in market applications. However, the conventional test methods have not kept ... 详细信息
来源: 评论
A unified global and local interconnect test scheme for Xilinx XC4000 FPGAs
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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT 2004年 第2期53卷 368-377页
作者: Sun, XL Trouborst, P Univ Alberta Dept Elect & Comp Engn Edmonton AB T6G 2V4 Canada Nortel Networks Ottawa ON K2C 3V5 Canada
This paper presents a unified global and local interconnect testing scheme for field programmable gate arrays. Adjacency graphs are used to model interconnect resources and their test requirements, and an efficient co... 详细信息
来源: 评论