We propose a direct simulation of an arbitrary network of splicing processors by a network of splicing processors having an underlying path graph. This is in line with similar simulations where the target network has ...
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We propose a direct simulation of an arbitrary network of splicing processors by a network of splicing processors having an underlying path graph. This is in line with similar simulations where the target network has other widely used graph topologies: complete graph, lattice graph, star graph, wheel graph, etc. Along with the effective construction, we provide an analysis of the size and timecomplexity of the obtained network. Our construction may not be the most economic conversion in terms of number of nodes, hence further investigation to find more succinct networks are of (at least) theoretical interest.
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