The author describes the word identification and synchronization capabilities of a new line code called 3T4B. This code is suitable for a medium-speed digital transmission system of more than 1 Mb/s, including optical...
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The author describes the word identification and synchronization capabilities of a new line code called 3T4B. This code is suitable for a medium-speed digital transmission system of more than 1 Mb/s, including optical link. Two versions of the 3T4B line code are presented. In comparison with 1T2B codes, these transcoding formats make it possible to decrease the transmission speed but require more complicated logics. These pulse formats satisfy all conditions required for digital transmission on optical fiber. The good synchronization performance of the proposed versions of the new code is shown.< >
This paper describes the architecture used in a 16 pin CMOS VLSI Digital Signal Processor which was designed by the authors to perform both ANSI and CCITT versions of the ADPCM standard. The part is designed to run fr...
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This paper describes the architecture used in a 16 pin CMOS VLSI Digital Signal Processor which was designed by the authors to perform both ANSI and CCITT versions of the ADPCM standard. The part is designed to run from a 20 MHz clock source with an instruction cycle time of 100 ns. This design is a good example of the power of application specific DSP designs to reduce the cost of implementing stable algorithms.
An extendible up/down counter configuration which provides for count-limit control is described. Cascaded regular structures composed of identical circuit modules are used. The design is well suited, for example, to h...
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An extendible up/down counter configuration which provides for count-limit control is described. Cascaded regular structures composed of identical circuit modules are used. The design is well suited, for example, to high-speed line-code conversion and transmission-error monitoring.
The introduction of High Definition Television (HDTV) as the new high quality television system for the future must avoid all deficiencies of today's systems. In addition, the pictures must be of noticeably higher...
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The introduction of High Definition Television (HDTV) as the new high quality television system for the future must avoid all deficiencies of today's systems. In addition, the pictures must be of noticeably higher quality than todays. On the other hand, consumer equipment must not be so expensive that a successful introduction will be hindered. The proposed progressive scan based system fulfils the requirements of the CCIR (twice the resolution in both spatial dimensions, good motion rendition) and allows for economic production of consumer equipment. In addition, the choice of parameters allows for future improvements in terms of spatial resolution and full digital transmission.< >
The authors present the design of a 32 kb/s data adaptive NIC transcoding algorithm and its implementation on the TMS320C25 digital signal processor. Some preliminary test results are presented for a single-stage rate...
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The authors present the design of a 32 kb/s data adaptive NIC transcoding algorithm and its implementation on the TMS320C25 digital signal processor. Some preliminary test results are presented for a single-stage rate-change filter for the rate conversion from 8 kHz to 6.667 kHz and vice versa. A two-stage rate-change filter using the combined decimator and rate-change filter approach is then designed to replace the original 128-tap single-filter. It is shown that since a rate change rate from 40 kHz to 6.667 kHz requires a decimation factor of M=6, a two-stage decimation of M=3 followed by M=2 will lead to further savings because a decimation filter for M=3 requires 11 taps while that for M=2 requires 53 taps.< >
A highly programmable, VLSI-based, 60-channel ADPCM (adaptive digital pulse-code modulation) transcoder has been developed. It converts two 2048-kb/s PCM streams into a single 2048-kb/s ADPCM stream and thereby double...
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A highly programmable, VLSI-based, 60-channel ADPCM (adaptive digital pulse-code modulation) transcoder has been developed. It converts two 2048-kb/s PCM streams into a single 2048-kb/s ADPCM stream and thereby doubles the channel capacity in the existing network. The equipment is fully CCITT-compatible, compact, and power-efficient. It features a wide range of operating options which are easily programmable either from a hand-held service terminal or from a remote maintenance centre. The transcoder can provide efficient solutions for growth of digital communication networks, as well as faster return on investments in digital transmission systems.< >
A simple and universal PCM/ADPCM transcoding algorithm, which does not accumulate distortion in multiple code conversions between PCM and ADPCM, has been derived by thoroughly investigating the PCM-ADPCM-PCM code conv...
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A simple and universal PCM/ADPCM transcoding algorithm, which does not accumulate distortion in multiple code conversions between PCM and ADPCM, has been derived by thoroughly investigating the PCM-ADPCM-PCM code conversion process. Conditions to avoid distortion in code conversions are clarified by newly introduced mathematical expressions for ADPCM and PCM quantization processes. These expressions can be utilized to simplify a code conversion process without losing generality. Distortion reduction on a code conversion can be realized by adding some functions to the ADPCM decoder output portion. This distortion reduction technique is shown to assure no distortion accumulation in tandem code conversions. In contrast to other reported techniques for tandem conversions, the proposed method is free from applied ADPCM structures, as well as being the simplest among them. As the mathematical treatment is so general, this technique can be applied to code conversions other than PCM/ADPCM conversions.
This paper details the development of a single chip VLSI processor which provides fully compatible CCITT 32kbps ADPCM transcoding. The chip is designed for multi-channel systems and is capable of processing eight inde...
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This paper details the development of a single chip VLSI processor which provides fully compatible CCITT 32kbps ADPCM transcoding. The chip is designed for multi-channel systems and is capable of processing eight independent channels in a 125 microsecond frame. To achieve this processing power, a specialized microcoded architecture for the ADPCM algorithm is implemented using a full custom two micron VLSI design methodology.
In this paper, the performances of PCM/ADPCM transcoding systems are analyzed. The coders studied are the 64 kbit/s PCM with μ-255 companding law and the 32 kbit/s ADPCM proposed by Cummiskey et al. The theoretically...
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In this paper, the performances of PCM/ADPCM transcoding systems are analyzed. The coders studied are the 64 kbit/s PCM with μ-255 companding law and the 32 kbit/s ADPCM proposed by Cummiskey et al. The theoretically predicted performance agrees closely with the results of computer simulation for a wide range of input signal level. According to the results, the performance degradation resulting from the code conversion process appears to be minimal for the single tandem case. However, for the case of multiple tandem code conversions, the performance becomes significantly degraded as the number of tandem coders increases. The overall performance of the transcoding system depends largely on the performance of the coder that is inferior to the other coder being cascaded.
The data rate of the third level of the digital hierarchy is regarded as particularly economical for the international exchange of television programs via satellite. Nonetheless, the exchange is aggravated by the fact...
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The data rate of the third level of the digital hierarchy is regarded as particularly economical for the international exchange of television programs via satellite. Nonetheless, the exchange is aggravated by the fact that this level has not been standardized on a world-wide scale. For example, a rate of 32 Mbits/s is used in Japan, 34 Mbits/s in Europe, and 44 Mbits/s in North America. The present paper details a procedure which allows digital TV signals of studio standard to be transmitted on 32-, 34-, or 44-Mbit/s channels by means of sampling rate conversion and adaptive source coding. For the case where an international link consists of sections using different data rates, a transcoding method is described and tested in computer simulations which converts the third-level rates into each other, without cascading of DPCM-decoders and-encoders.
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