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IEEE Workshop on Signal Processing Systems

作者： Mao, Zhen He, Yun Tsinghua Univ Dept Elect Engn Beijing 100084 Peoples R China

ISBN: (纸本)9781424412211

Typical VLC schemes use fixed Huffman tables, thus the coding efficiency is far from the real Huffinan coder. By employing multiple fixed code tables, the performance should be increased and approach the ideal Huffman coder. Since the fixed table VLC method is not the "minimum redundant" one, there is a believe that the redundancy between symbols still exists and there should be methods which could further remove it, and the possible way is encoding concatenation of codewords together, i.e., applying a post-processing on the VLC code streams. Some models are given to describe how much equivalent redundancy exist within the VLC code streams by using the channel coding concepts. Starting from those models, we introduce some modifications to evaluate the inter symbol redundancy for source coding. The estimation based on the models for the redundancies of H.263 and AVS are shown, which may lead us to understand the post-processing efficiency could achieve.

关键词： variable length coding source redundancy post-processing VLC scheme H.263 AVS

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A Design of High-Performance Pipelined Architecture for H.264/AVC CAVLC Decoder and Low-Power Implementation

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IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 2010年第4期56卷 2781-2789页

作者： Lee, Byung-Yup Ryoo, Kwang-Ki Hanbat Natl Univ Dept Informat & Commun Taejon South Korea Hanbat Natl Univ Dept Informat & Commun Engn Taejon South Korea Hanbat Natl Univ Grad Sch Informat & Commun Taejon South Korea

In this paper, we propose a highly efficient VLSI architecture for context-based adaptive variable-length coding (CAVLC) decoder. In multimedia data processing systems, the real-time processing requirement is the most critical problem and the only requirement that must be satisfied. Thus, an architecture which has a short processing time though a high throughput, can meet the requirement at low operating frequencies. Consequently, the architecture can have an advantage of low power consumption. We propose two methods to improve the throughput of CAVLC decoders. The first method eliminates the pipeline hazard in a pipelined architecture for CAVLC decoder. The second method expands the capacity of the barrel shifter. Experimental results show that the proposed architecture can improve throughput by about 45%. As a result, the proposed architecture greatly reduces the operating frequency for real-time processing, which is the key factor of reducing power consumption. The synthesis result shows that the design achieves the maximum operating frequency at 125 MHz, and the hardware cost is about 12.6K under a 0.18 um CMOS process(1).

关键词： Context-based variable length coding CAVLC H.264/AVC low-power variable length coding

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A Bandwidth Reduction Scheme and Its VLSI Implementation for H.264/AVC Motion Vector Decoding

A Bandwidth Reduction Scheme and Its VLSI Implementation for...

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11th Pacific Rim Conference on Multimedia

作者： Zhou, Jinjia Zhou, Dajiang He, Gang Goto, Satoshi Waseda Univ Grad Sch Informat Prod & Syst Tokyo Japan

ISBN: (纸本)9783642156953

In this paper, a bandwidth reduction scheme and its VLSI implementation for H.264/AVC motion vector decoding component is proposed to save the DRAM traffic. In this component, the motion information including motion vector and reference index, for the co-located picture and the last decoded line, is stored in DRAM. In order to save the DRAM access, a partition based storage format is first applied to condense the MB level data. Then, a DPCM-based variable length coding method is utilized to reduce the data size of each partition. Finally, the total bandwidth is further reduced by combining the co-located and last-line information. Experimental results show that the bandwidth requirement for motion vector calculation can be reduced by 85%similar to 98% on typical 1080p and QFHD sequences, with only 7.8k additional logic gates. This can contribute to near 20% bandwidth reduction for the whole video decoder system.

关键词： Motion vector decoding DRAM bandwidth ultra high resolution variable length coding H.264/AVC

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An efficient VLSI implementation of H.264/AVC entropy decoder

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Journal of Measurement Science and Instrumentation 2010年第S1期1卷 143-146页

作者： Jongsik PARK Jeonhak MOON Seongsoo LEE School of Electronics Engineering Soongsil University

This paper proposes an efficient H.264/AVC entropy *** requires no ROM/RAM fabrication process that decreases fabrication cost and increases operation *** was achieved by optimizing lookup tables and internal buffers,which significantly improves area,speed,and *** proposed entropy decoder does not exploit embedded processor for bitstream manipulation, which also improves area,speed,and *** gate counts and maximum operation frequency are 77515 gates and 175MHz in 0.18um fabrication process,*** proposed entropy decoder needs 2303 cycles in average for one macroblock *** can run at 28MHz to meet the real-time processing requirement for CIF format video decoding on mobile applications.

关键词： video coding H.264/AVC entropy coding variable length coding CAVLC

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Context-based entropy coding in AVS video coding standard

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SIGNAL PROCESSING-IMAGE COMMUNICATION 2009年第4期24卷 263-276页

作者： Zhang, Li Wang, Qiang Zhang, Ning Zhao, Debin Wu, Xiaolin Gao, Wen Chinese Acad Sci Inst Comp Technol Key Lab Intelligent Informat Proc Beijing Peoples R China Harbin Inst Technol Dept Comp Sci & Engn Harbin 150006 Peoples R China McMaster Univ Dept Elect & Comp Engn Hamilton ON L8S 4L8 Canada Peking Univ Sch Elect Engn & Comp Sci Inst Digital Media Beijing 100871 Peoples R China

In this paper, two context-based entropy coding schemes for AVS Part-2 video coding standard are presented. One is Context-based 2D variable length coding (C2DVLC) as a low complexity entropy coding scheme for AVS Part-2 Jizhun profile. C2DVLC uses Multiple 2D-VLC tables to exploit the statistical features of DCT coefficients for higher coding efficiency. Exponential-Golomb codes are applied in C2DVLC to code the pairs of the run-length of zero coefficients and the non-zero coefficients for lower storage requirement. The other is Context-based Binary Arithmetic coding (CBAC) as an enhanced entropy coding scheme for AVS Part-2 Jiaqiang profile. CBAC utilizes all previously coded coefficient magnitudes in a DCT block for context modeling. This enables adaptive arithmetic coding to exploit the redundancy of the high-order Markov process in DCT domain with a few contexts. In addition, a context weighting technique is used to further improve CBAC's coding efficiency. Moreover, CBAC is designed to be compatible to C2DVLC in coding elements which simplifies the implementations. The experimental results demonstrate that both C2DVLC and CBAC can achieve comparable or even slightly higher coding performance when compared to Context-Adaptive variable length coding (CAVLC) in H.264/AVC baseline profile and Context-Based Adaptive Binary Arithmetic coding (CABAC) in H.264/AVC main profile respectively. (C) 2009 Elsevier B.V. All rights reserved.

关键词： AVS DCT video coding Entropy coding Context modeling variable length coding Arithmetic coding

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Novel First-one detector architecture applied in VLC

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IEICE ELECTRONICS EXPRESS 2009年第7期6卷 403-406页

作者： Liu, Rongke Lai, Dayu Yu, Peng Beihang Univ Sch Elect & Informat Engn Beijing 100191 Peoples R China

The variable length coding (VLC) has gained greater attention due to its wide application in the international standard, H. 264/AVC and Chinese standard, AVS. A First-one detector is an indispensable module of VLC, such as CAVLC and Exp-Golomb coding. In this paper, a novel First-one implementation architecture is proposed, which can locate the First-one in the codeword in only one cycle. The architecture applies the combinational logic to parse the position of the separator '1'. Compared with the conventional methods, this approach has higher efficiency.

关键词： VLSI architecture variable length coding combination logical

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H.264/AVC IMPROVEMENT BASED ON ADAPTIVE MOTION VECTOR coding

H.264/AVC IMPROVEMENT BASED ON ADAPTIVE MOTION VECTOR CODING

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Picture coding Symposium 2009

作者： Takahashi, Masashi Yamaguchi, Muneaki Hitachi Ltd Embedded Syst Platform Lab Totsuka Ku Yokohama Kanagawa 2440817 Japan

ISBN: (纸本)9781424445936

We propose a new method for improving motion vector coding. The coding efficiency of the H.264/AVC standard is significantly degraded for video sequences that include irregular motions. The degradation is caused by the fact that the correlations among the motion vectors on adjacent blocks get to be small when motions are irregular. Our method solves this problem by two schemes. First, the predictive motion vector (PMV) is adaptively coded with additional bits based on the distribution pattern of reference vectors. Second, an appropriate code table for the motion vector difference (MVD) is adaptively selected out of a couple of tables defined in advance. These schemes enable the appropriate methodologies for the motion vector coding to be adaptively selected according to the motion vector diversity. Experimental results show the effectiveness and potentiality of our approach for high coding efficiency.

关键词： motion vector coding motion vector predictor variable length coding H.264/AVC

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A highly efficient VLSI architecture for H.264/AVC CAVLC decoder

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IEEE TRANSACTIONS ON MULTIMEDIA 2008年第1期10卷 31-42页

作者： Lin, Heng-Yao Lu, Ying-Hong Liu, Bin-Da Yang, Jar-Ferr Natl Cheng Kung Univ Dept Elect Engn Tainan 70101 Taiwan

In this paper, an efficient algorithm is proposed to improve the decoding efficiency of the context-based adaptive variable length coding (CAVLC) procedure. Due to the data dependency among symbols in the decoding How, the CAVLC decoder requires large computation time, which dominates the overall decoder system performance. To expedite its decoding speed, the critical path in the CAVLC decoder is first analyzed and then reduced by forwarding the adaptive detection for succeeding symbols. With a shortened critical path, the CAVLC architecture is further divided into two segments, which can be easily implemented by a pipeline structure. Consequently, the overall performance is effectively improved. In the hardware implementation, a low power combined LUT and single output buffer have been adopted to reduce the area as well as power consumption without affecting the decoding performance. Experimental results show that the proposed architecture surpassing other recent designs can approximately reduce power consumption by 40% and achieve three times decoding speed in comparison to the original decoding procedure suggested in the H.264 standard. The maximum frequency can be larger than 210 MHz, which can easily support the real-time requirement for resolutions higher than the HD1080 format.

关键词： context-based adaptive variable length coding (CAVLC) H.264/AVC variable length coding

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Design of H.264/AVC entropy decoder without internal ROM/RAM memories

Design of H.264/AVC entropy decoder without internal ROM/RAM...

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3rd IEEE International Symposium on Control, Communications and Signal Processing (ISCCSP 2008)

作者： Moon, Jeonhak Lee, Seongsoo Soongsil Univ Sch Elect Engn Seoul South Korea

ISBN: (纸本)9781424416875

This paper proposes an H.264/AVC entropy decoder without embedded processor or internal ROM/RAM memories. Conventional H.264/AVC entropy decoders have large internal ROM/RAM memories in context-adaptive variable length decoder. This requires special ROM/RAM fabrication process, which is difficult to be implemented in general digital logic fabrication process. Furthermore, they require embedded processors for bitstream manipulation, which increases area and power consumption. This paper proposes hardwired H.264/AVC entropy decoder without embedded processor, which improves data processing speed and reduces power consumption. Furthermore, it exploits optimized lookup tables and internal buffers without internal ROM/RAM which reduces hardware size and can be implemented in general digital logic fabrication process. Designed entropy decoder was embedded in H.264/AVC video decoder, and it was verified to operate correctly in the system. It supports QCIF, CV, QVGA, and VGA format, and its maximum operation frequency is 125MHz.

关键词： variable length coding entropy decoder CAVLC exponential golomb H.264/AVC

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IMPROVED H.264 INTRA coding BASED ON BI-DIRECTIONAL INTRA PREDICTION, DIRECTIONAL TRANSFORM, AND ADAPTIVE COEFFICIENT SCANNING

IMPROVED H.264 INTRA CODING BASED ON BI-DIRECTIONAL INTRA PR...

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15th IEEE International Conference on Image Processing (ICIP 2008)

作者： Ye, Yan Karczewicz, Marta Qualcomm Inc San Diego CA USA

ISBN: (纸本)9781424417650

In this paper, a novel intra coding scheme is proposed. The proposed scheme improves H.264 intra coding from three aspects: 1) H.264 intra prediction is enhanced with additional bi-directional intra prediction modes;2) H.264 integer transform is supplemented with directional transforms for some prediction modes;and 3) residual coefficient coding in CAVLC is improved. Compared to H.264, together the improvements can bring on average 7% and 10% coding gain for CABAC and for CAVLC, respectively, with average coding gain of 12% for HD sequences.

关键词： H.264 intra coding intra prediction block transform variable length coding

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