Block based motion estimation is usually used to reduce the computational complexity while preserving a good quality of the images used in real-time videocoding. A new block matching motion estimation algorithm calle...
详细信息
Block based motion estimation is usually used to reduce the computational complexity while preserving a good quality of the images used in real-time videocoding. A new block matching motion estimation algorithm called star diamond search is proposed in this paper. This one proceeds in two stages: the first one consists in carrying out a search having star shape. This one aims a coarse search for the solution, the second phase consists in refining the search for the solution. A comparative study with the most known methods is given showing the interest of the proposed algorithm.
With the introduction of high efficiency videocoding (HEVC) standard which provides super compression efficiency, there has been a lot of research works on integer transform matrices that can provide good approximati...
详细信息
With the introduction of high efficiency videocoding (HEVC) standard which provides super compression efficiency, there has been a lot of research works on integer transform matrices that can provide good approximation to the discrete cosine transform (DCT) used in HEVC. Not only maintaining the coding performance, the hardware and power of the circuit to implement the derived integer DCT (Int-DCT) needs to be minimized. To address these multiple design considerations, a new multi-objective optimization algorithm is proposed in this paper to search for efficient Int-DCT matrix, which has the coding performance as close as possible to the transform in HEVC but implemented with reduced hardware and power. Experimental results show that the approximated Int-DCT matrix generated by the proposed algorithm can achieve almost the same coding performance as the transforms in HEVC measured in terms of Bjntegaard Delta rate. Meanwhile, the experiments demonstrate that the proposed 16-point Int-DCT can produce at least 15.5 and 26.8 lower circuit area in FPGA and ASIC respectively, compared with other state-of-the-art Int-DCT realizations which can provide similar coding performance.
暂无评论