检索结果-内蒙古大学图书馆

Experiences on developing computer vision hardware algorithms using xilinx system generator

MICROPROCESSORS AND MICROsystemS 2005年第8-9期29卷 411-419页

作者： Moreo, AT Lorente, PN Valles, FS Muro, JS Andrés, CF Univ Politecn Cartagena Div Sistemas & Ingn Elect E-30202 Cartagena Spain

Computer vision is one of the areas where hardware-implemented algorithms perform clearly better than those implemented via software. Digital designers have so far optimized their designs by means of application specific integrated circuits (ASICs) or digital signal processors (DSPs). However, nowadays they are increasingly using field programmable gate arrays (FPGAs), powerful hardware devices combining the main advantages of ASICs and DSPs with the possibility of re-programming, which make them very attractive devices for rapid prototyping. This paper shows how the xilinx system generator (XSG) environment can be used to develop hardware-based computer vision algorithms from a system level approach, which makes it suitable for developing co-design environments. (C) 2004 Elsevier B.V. All rights reserved.

关键词： computer vision co-design environments FPGA-based hardware implementation MatLab xilinx system generator

来源：评论

学校读者我要写书评

暂无评论

Realization of active power filter based on indirect current control algorithm using xilinx system generator for harmonic elimination

引用

INTERNATIONAL JOURNAL OF ELECTRICAL POWER & ENERGY systemS 2016年 74卷 420-428页

作者： Dash, Santanu Kumar Panda, Gayadhar Ray, Pravat Kumar Pujari, Sashank Sekhar Natl Inst Technol Rourkela Dept Elect Engn Rourkela 769008 India Natl Inst Technol Meghalaya Dept Elect Engn Shillong 793003 Meghalaya India SUIIT Burla Dept Elect & Commun Engn Sambalpur 768019 India

Realization of active power filter with Model Based Design approach is presented in this paper. The approach adopts different modeling platforms as well as selection of proper hardware for step wise verification and testing. The active power filter model is developed using the Matlab/Simulink platform for single phase. The efficiency of the control algorithms such as synchronous detection method and indirect current control for active power filter is analyzed. Efficient control algorithm is developed by xilinx system generator which is incorporated into Simulink as xilinx tool box. xilinx system generator provides a virtual platform for easy and effective design of the required system models in FPGA (field programmable gate array) design environments. Optimized automatic VHDL code is generated for the control algorithm which is simulated using ISE 13.2 for the generation of switching signals for the control of IGBTs of the active power filter. Suitable compensation signal is generated from the active power filter for the better elimination harmonics to improve the power quality. THD is reduced to a considered value which is able to satisfy the limits of the IEEE standard. (C) 2015 Elsevier Ltd. All rights reserved.

关键词： Active Power Filter (APF) Model Based Design xilinx system generator Field programmable gate array (FPGA) Total Harmonic Distortion (THD)

来源：评论

学校读者我要写书评

暂无评论

Instantaneous d frame driven shunt active filter for harmonics and reactive power mitigation using xilinx system generator

引用

AIN SHAMS ENGINEERING JOURNAL 2019年第1期10卷 15-22页

作者： Sriranjani, Ramakrishnan Jayalalitha, Subbaiah SASTRA Deemed Univ EEED SEEE Thanjavur Tamil Nadu India SASTRA Deemed Univ EIED SEEE Thanjavur Tamil Nadu India

Instantaneous d frame driven Shunt active filter (SAF) alleviate harmonics and reactive power. This control algorithm evolved from elemental synchronous reference frame engenders the fundamental reference signal from the load current with a phase shift of zero angle. The proposed algorithm is tested in harmonic load and reactive load and it is verified by implementing the model in MATLAB xilinx system generator. The comparison study was carried out for the proposed algorithm and conventional algorithm and the results are presented in this paper. (C) 2018 The Authors. Published by Elsevier B.V. on behalf of Faculty of Engineering, Ain Shams University.

关键词： Harmonics Reactive power Shunt active filter MATLAB xilinx system generator

来源：评论

学校读者我要写书评

暂无评论

Rapid prototyping of power electronics converters for photovoltaic system application using xilinx system generator

引用

IET POWER ELECTRONICS 2014年第9期7卷 2269-2278页

作者： Selvamuthukumaran, Rajasekar Gupta, Rajesh Motilal Nehru Natl Inst Technol Dept Elect Engn Allahabad 211004 Uttar Pradesh India

The aim of this study is to develop a research platform for rapid prototyping of the power electronics converters for solar photovoltaic (PV) system applications. This study describes the field-programmable gate array (FPGA)-based hardware-inthe- loop (HIL) simulation of voltage source inverter (VSI) used for PV system power conversion. The PV system and inverter models are realised in simulation as part of the HIL to test the real-time functionality of the FPGA controller. The generation of switching control signals for the VSI and its interface with the PV system is developed through the xilinx system generator (XSG) domain. The XSG automatically generates the VHSIC hardware description language (VHDL) code using hardware description language co-simulation for generation of gating signal for modulation of the VSI. To validate the proposed approach, the sinusoidal pulse-width modulation using bipolar and unipolar switching schemes and current control method have been tested for the PV supported VSI. The proposed approach of the rapid prototype model has been designed and implemented in the laboratory through XSG and MATLAB/SIMULINK interface. Performance comparison between the software simulation and real-time HIL simulation has been demonstrated.

关键词： solar power stations photovoltaic power systems power generation control power engineering computing control engineering computing electric current control field programmable gate arrays hardware description languages PWM invertors software prototyping PWM power convertors rapid power electronic converter prototyping solar photovoltaic system applications xilinx system generator field-programmable gate array-based hardware-in-the-loop simulation FPGA controller HIL voltage source inverter VSI PV system power conversion switching control signal generation XSG automatic VHDL code generation hardware description language cosimulation gating signal generation sinusoidal pulse-width modulation bipolar switching schemes unipolar switching schemes current control method MATLAB-SIMULINK interface

来源：评论

学校读者我要写书评

暂无评论

A self control strategy for a delta inverter fed BDCM Drive using xilinx system generator with fixed point/floating point mode 17

A self control strategy for a delta inverter fed BDCM Drive ...

引用

17th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA)

作者： Alouane, Asma Ben Rhouma, Asma Khedher, Adel Univ Sousse Natl Engn Sch Sousse Unit Res Adv Syst Elect Engn BP 264 Erriadh 4023 Tunisia

ISBN: (纸本)9781509034079

This paper develops the self control strategy of the Brushless DC Motor (BDCM) fed by the reduced Three Switch Three Phase Inverter (TSTPI) using the xilinx Kintex 7 Field Programmable Gate Arrays (FPGA) package. This proposed command begins with a test simulation on the numerical environment matlab using in the first step the simulink toolbox and in the second step the xilinx system generator (XSG) one. A comparative study of the self control simulation results is exposed between the model developed in matlab simulink, with the one treated by the matlab\(XSG) considering the two cases: fixed point and floating point precision. After checking the difference between simulation results using the XSG floating point and the XSG fixed point of the same control strategy design, a VHDL code is easily and automatically generated. A report which characterized the XSG architecture designs for both precisions is exploited and discussed. In this work, the self control strategy design has used as latency mu s during an execution frequency equal to 0.2 MHz in 68clock cycles with 100 MHz maximum FPGA clock frequency. With these parameters, it is demonstrated that the FPGA implementation of the self control strategy using the floating point precision can yet reach a better performance at high sampling frequency.

关键词： self control BDCM delta inverter xilinx system generator fixed point, floating point

来源：评论

学校读者我要写书评

暂无评论

An Efficient Design for Canny Edge Detection Algorithm using xilinx system generator 3

An Efficient Design for Canny Edge Detection Algorithm using...

引用

3rd IEEE International Conference on Research in Intelligent and Computing in Engineering (RICE)

作者： Mahalle, Avinash G. Shah, A. M. Govt Coll Engn Dept Elect Engn Amravati Maharashtra India

ISBN: (纸本)9781538625996

Digital Image consists of some informative pixels and some redundant pixels. Edge Detection is the process of preserving informative pixels and eliminating redundant data which improves bandwidth and storage efficiency. A sudden change in pixel intensity level is defined as an Edge. Theoretically, from the literature it is seen that Canny edge detection is the most accurate algorithm. It is also insensitive to Noise. The only disadvantage of Canny algorithm is its high computational complexity which limits its maximum frequency of application with high latency and low throughput. In this paper, tradeoff between Accuracy and Complexity is studied. An efficient Canny algorithm is designed using xilinx system generator which utilizes JTAG Hardware co-simulation approach. An accuracy is compromised in order to make it more efficient in terms of resource utilization than the conventional one. Spartan-3E FPGA is used as a reconfigurable hardware platform for the designed algorithm.

关键词： Image Processing Edge Detection Canny Algorithm xilinx system generator Spartan-3E FPGA

来源：评论

学校读者我要写书评

暂无评论

FPGA Implementation of Matrix-Vector Multiplication Using xilinx system generator 13

FPGA Implementation of Matrix-Vector Multiplication Using Xi...

引用

International Conference on Advanced systems and Electric Technologies (IC_ASET)

作者： Sayahi, Intissar Machhout, Mohsen Tourki, Rached Univ Tunis Elmanar Fac Math Phys & Nat Sci Tunis Lab Elect & Microelect EEL FSM Monastir Tunisia Univ Monastir Fac Sci Monastir Lab Elect & Microelect EEL Monastir Tunisia

ISBN: (纸本)9781538644492

In diverse domains, the scientific applications requires severe computing algebra routines. The matrix multiplication presents an indispensable mathematical operation in many high performance fields. This paper presents a new FPGA design and implementation for matrix vector multiplication. The design has been implemented with xilinx system generator. The results of FPGA implementation were compared with similar work on VIRTEX 4 platform. It demonstrates the efficiency of our work in term of resources utilization and speed up.

关键词： Matrix multiplication FPGA xilinx system generator systolic architecture

来源：评论

学校读者我要写书评

暂无评论

CIC FOR DECIMATION AND INTERPOLATION USING xilinx system generator

CIC FOR DECIMATION AND INTERPOLATION USING XILINX SYSTEM GEN...

引用

2nd IEEE International Conference on Communications and Signal Processing (ICCSP)

作者： Elamaran, V. Vaishnavi, R. Rozario, A. Maxel Joseph, Slitta Maria Cherian, Aylwin SASTRA Univ SEEE Dept Elect & Commun Engn ECE Thanjavur India

ISBN: (纸本)9781467348669;9781467348652

In this paper a Cascaded integrated comb (CIC) filter, an optimized class of linear filters such as FIR is implemented for digital up conversion (DUC) and digital down conversion (DDC) for efficient transmission and reception in multirate system. CIC filters are often used for the purpose of reducing sampling rate (decimation) and increasing sampling rate (interpolation). Our work is to show the efficiency of CIC filters over FIR filters in fixed point applications. Single stage CIC filter and multistage CIC filters for interpolation and decimation are realized. Here multirate filter design models for decimation and interpolation are developed using xilinx system generator. Also multirate filters are further improved by cascading various CIC filter stages.

关键词： CIC filter decimator FPGA interpolator xilinx system generator

来源：评论

学校读者我要写书评

暂无评论

IIR Digital Filter Design using xilinx system generator for FPGA Implementation 7

IIR Digital Filter Design using Xilinx System Generator for ...

引用

7th IEEE International Conference on Communication and Signal Processing (IEEE ICCSP)

作者： Priya, P. Ashok, S. Natl Inst Technol Calicut Post Grad Elect Engn Dept Kozhikode Kerala India Natl Inst Technol Calicut Dept Elect Engn Kozhikode Kerala India

ISBN: (纸本)9781538635216

In general Application Specific Integrated Circuits (ASIC) and Digital Signal Processors (DSP) are usually used for implementing digital filters. As compared to the conventional methods available the speed of computation of digital filter is increased by implementing on Field Programmable Logic Gate Array (FPGA). This paper provides a novel design and implementation of digital filter in FPGA using a high level description tool like xilinx system generator. The designed filter with desired specification is analyzed in Simulink environment in MATLAB. A method for implementing IIR filter in FPGA using system generator is proposed. The xilinx system generator is used for synthesizing and simulation for FPGA filter analysis. The FPGA shows its high performance in terms of speed, memory, resource management, and power consumption.

关键词： Digital Filter Field Programmable Logic Gate Array Infinite Impulse Response filter xilinx system generator

来源：评论

学校读者我要写书评

暂无评论

OVSF Code generator for 3G Wireless Transceivers Using xilinx system generator

OVSF Code Generator for 3G Wireless Transceivers Using Xilin...

引用

IEEE International Conference on Control, Automation, Robotics and Embedded systems (CARE)

作者： Purohit, Gaurav Chaubey, V. K. Raju, Kota Solomon BITS Pilani Dept EEE Pilani Campus Pilani Rajasthan India CSIR - CEERI Pilani Digital Syst Grp Pilani Rajasthan India

ISBN: (纸本)9781467361538

The Orthogonal variable spreading factor (OVSF) codes were first introduced for 3G standards. The OVSF are channelization codes are widely used for preserving the orthogonality between physical channels in a communication system. They become essential for increasing system capacity as well as to provide multiple data rates for supporting different bandwidth requirements. This scheme is known as OVSF-CDMA. This paper presents the hardware co-simulation realization of parameterized OVSF code with classical counter based approach using xilinx system generator software tools. The OVSF code is first modeled in MATLAB Simulink based system generator using Black box in VHDL for delay synthesis, timing analysis and validating for software testing as per required standard for WCDMA i.e. TCHIP is 260ns or FCHIP 3.84 MHz. The claimed result i.e. 2ns can meet the time specification of desired standards. The target FPGA device is Virtex-5 (XC5VLX50T-1ff1136.

关键词： CDMA JTAG Co-Simulation SDR OVSF UMTS xilinx system generator

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：