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检索条件"主题词=Xilinx System Generator"

共 139 条记录，以下是81-90 订阅

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Design and Simulation of Software Defined Radio Using MATLAB® SIMULINK® 11

Design and Simulation of Software Defined Radio Using MATLAB...

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11th IEEE and IFIP International Conference on Wireless and Optical Communications Networks (WOCN)

作者： Patil, Hemangi N. Ohatkar, Sharada N. Cummins Coll Engn E&TC Dept Pune Maharashtra India

ISBN: (纸本)9781479931569

Software Defined Radio (SDR) has been one of the new techniques developed to change the way the traditional wireless communication systems work. SDRs enable us to build reconfigurable and interoperable radios that can be upgraded for future technologies. Designing a multi-modulation schemes system in term of hardware will cost a lot and definitely consume power and increase the interference. This paper presents the design of baseband processing section of Software Defined Radio, using MATLAB (R) SIMULINK (R) tool incorporated with xilinx system generator, using QPSK. The simulated results of designed SDR system are verified through hardware co simulated results. The same model is then in its Verilog form synthesized in xilinx ISE Design suite.

关键词： Software Defined Radio Bit Error Rate Signal to Noise Ratio MATLAB/Simulink xilinx system generator

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Implementation of Optimal Control Techniques on FPGA

Implementation of Optimal Control Techniques on FPGA

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International Conference on Advanced Electrical Engineering (ICAEE)

作者： Ahmed, Samet Yahia, Kourd Mohamed Cherif Messaadia Univ Lab Elect Engn & Renewable Energy LEER Souk Ahras Algeria

ISBN: (纸本)9781728122205

nowadays, optimal control is an active research sub-area of control and systems engineering because of its applications in different human activities. Literature provides various algorithms for optimal control in various domains. At the same time the process is extremely computational exhaustive. For carrying out this task in real time a system which is really fast is required. Software does not seem to be a suitable candidate for implementing it in real time. We require some technology that has huge amount of parallelism. The high amount of computation power in limited time can be achieved by using FPGA as a platform. The proposed work of this paper is FPAG implementation using techniques of optimal command applied to a DC motor used in a physical pendulum, based on linear algebra and matrix calculation. The proposed implementation of our proposed observer is done using xilinx system generator (XSG) which co-simulated on both software/hardware using Simulink and XGS tools.

关键词： Optimal control Hardware implementation in-the-loop FPGA Physical pendulum xilinx system generator

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A Simplified SVM-DTC Algorithm Based on Integral Derivative Sliding Mode Control for Electrical Machines

A Simplified SVM-DTC Algorithm Based on Integral Derivative ...

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International Conference on Advanced systems and Emergent Technologies (ICASET)

作者： Krim, Saber Mimouni, Mohamed Faouzi Univ Kairouan ISSAT Kasserine Kairouan Tunisia Univ Monastir Lab Automat Elect Syst & Environm LASEE Monastir Tunisia Natl Engn Sch Monastir Dept Elect Engn Lab Automat Elect Syst & Environm LASEE Monastir Tunisia

ISBN: (纸本)9798350384901;9798350384895

this paper presents a novel approach for achieving high-speed processing of Integral Derivative Sliding Mode Speed Controller (IDSMSC) based Space Vector Modulation Direct Torque Control (SVM-DTC) algorithm using a Field-Programmable Gate Arrays (FPGA) for controlling an Induction Motor (IM). As a first contribution in this work, the proposed IDSMSC aims to enhance the dynamic response and robustness of IM drive through the utilization of IDSMSC technique, known for its superior performance in tracking reference signals and rejecting disturbances. The second contribution consists in implementing the proposed SVM-DTC-IDSMSC algorithm on an FPGA platform. Indeed, significant improvements in processing speed and real-time responsiveness will be attained, enabling efficient execution of complex control strategies. In fact, the integration of FPGA technology ensures precise timing synchronization and parallel processing capabilities, facilitating rapid computation of control actions with minimal latency, which consequently reduce the ripples in the torque and the harmonics in the current. Through simulation studies using xilinx system generator toolbox under Matlab environment and performance analysis, the effectiveness and feasibility of the proposed approach are demonstrated, highlighting its potential for high-performance control applications in industrial settings.

关键词： integral derivative sliding mode controller parallel processing induction motor direct torque control FPGA xilinx system generator

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FPGA-Based system Level Design of Control systems: A Case Study of Three-Axis Positioning Controller Implementation

FPGA-Based System Level Design of Control Systems: A Case St...

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International Conference on New Trends in Signal Processing (NTSP)

作者： Stankovic, Momir Manojlovic, Stojadin Simic, Slobodan Mitrovic, Srdjan Naumovic, Milica Univ Def Mil Acad Belgrade Serbia Univ Nis Fac Elect Engn Nish Serbia

ISBN: (纸本)9788080405298

In this paper Field Programmable Gate Array (FPGA) system level based methodology for control system design is proposed and described in details on the case study of three-axis positioning controller implementation. system level design tool, such as xilinx system generator (XSG), provides Simulink based FPGA design and automatic converting of XSG model into efficient Very high speed integrated circuit Hardware Description Language (VHDL) code, increasing productivity by reducing the design time. The optimal design, in terms of FPGA recourse occupancy, is provided using restructuring data flow graph (DFG) of control algorithm and specifying the optimal fixed-point format. The proposed approach is validated through real experiments on three-axis didactic radar platform.

关键词： Field Programmable Gate Array xilinx system generator optimized design position control

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Practical Implementation of Sensorless Robust Control of Boost Converter 16

Practical Implementation of Sensorless Robust Control of Boo...

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16th International Bhurban Conference on Applied Sciences and Technology (IBCAST)

作者： Ashfaq, Muhammad Alam, Farooq Hussain, Shabbir CESAT Islamabad Pakistan Natl Univ Sci & Technol Dept Elect & Power Engn Islamabad Pakistan

ISBN: (纸本)9781538677292

This paper proposes practical implementation of current sensor-less robust control technique for DC-DC boost converter. Close loop feedback control of DC-DC boost converter requires inductor current as feedback signal. However, inductor current requires expensive sensor for measurement which increases overall cost and complexity of system. To reduce cost, complexity and other associated problems we propose robust method for the estimation of inductor current by employing Higher Gain Observer (HGO). Furthermore, for robust control of output voltage control we used Non singular terminal sliding mode control (NTSMC). Moreover, proposed sensor-less control strategy is practically implemented using Field Programmable Gate Arrays (FPGA). It is shown by simulation that proposed system is robust under parametric variations and unknown disturbances.

关键词： Sensor-less speed control technique DC-DC Converter Buck Boost converter xilinx system generator practical implementation using FPGA

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FPGA Design of Efficient Kidney Image Classification using Algebric Histogram Feature Model and Sparse Deep Neural Network (SDNN) Techniques

FPGA Design of Efficient Kidney Image Classification using A...

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Conference on Emerging Devices and Smart systems (ICEDSS)

作者： Vinoth, R. Bommannaraja, K. Mahendra Engn Coll Dept Elect & Commun Engn Namakkal Tamil Nadu India KPR Inst Engn & Technol Dept Elect & Commun Engn Coimbatore Tamil Nadu India

ISBN: (纸本)9781509055555

This work proposed a sparse learning optimization based kidney image classification using Sparse Deep Neural Network (SDNN) similarity measure. The kidney images are acquired and preprocessed to improve the image quality. Then the method splits the image into number of sectional image which Crops the Image for Number of Times Using Feature Extraction Method. Feature extraction using Algebraic Histogram based Sum and difference model to extract the 2d and 3d features of kidney image. The textures features are segmented by Algebric histogram (AH) method and the features are optimized using the hardware model. Based on the sparse classification depthness measure the method identifies the region which has affected or abnormal. At the classification stage, the method computes the sparse learning based pixel similarity measure to identify the most affected region and to perform classification. The entire hardware model can be split into two important levels namely Algebric histogram based Feature extraction and sparse learning based feature classification using SDNN technique. The identification of the kidney Abnormality in the image is displayed with colour for easy identification and visibility in monitor using HDL algorithms. The design and implementation in real time on both Field Programmable Gate Array (FPGA) using xilinx system generator (XSG) and Matlab 2013a.

关键词： Sparse Deep Neural Network Algebric histogram Hardware Description Language Field Programmable Gate Array xilinx system generator

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Processor-in-the-Loop and Hardware-in-the-Loop Simulation of Electric systems based in FPGA 13

Processor-in-the-Loop and Hardware-in-the-Loop Simulation of...

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13th International Conference on Power Electronics (CIEP)

作者： Mina, J. Flores, Z. Lopez, E. Perez, A. Calleja, J. -H. CENIDET Dept Elect Engn Cuernavaca Morelos Mexico

ISBN: (纸本)9781509017751

Processor-in-the-loop (PIL) is a test technique that allows designers to evaluate a controller, running in a dedicated processor, of a plant which runs in an offline simulation platform. By the other side, Hardware-in-the-Loop (HIL) is an approach to test a plant or controller running in a digital platform which interacts with the real controller or plant. Here we present how to implement PIL and the preliminaries to HIL of electronic/electric systems with easy access technology through a code generation tool called xilinx system generator, a FPGA device and a personal computer. Two systems with different dynamics, a dc-dc buck converter and a dc motor, are selected in order to illustrate the FPGA based PIL and HIL implementation. For every system its model synthetization as well as its corresponding settings is carried out and tested.

关键词： Processor-in-the-loop Hardware-in-the-loop Real Time Simulation xilinx system generator FPGA

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Optimization of High-Level Design edge detect filter for Video Processing system on FPGA

Optimization of High-Level Design edge detect filter for Vid...

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Intelligent systems and Computer Vision (ISCV)

作者： Alareqi, Mohammed Elgouri, R. Mateur, K. Zemmouri, A. Mezouari, A. Hlou, L. Ibn Tofail Univ Fac Sci Lab Elect Engn & Energy Syst Kenitra Morocco Ibn Tofail Univ Natl Sch Appl Sci Kenitra Morocco

ISBN: (纸本)9781509040629

This paper presents the design and the implementation of edge detect filter is optimized for video processing applications on FPGAs. It outlines efficient hardware architecture of spatial filtering (edge detection) for video processing system. This architecture offers a substitute through a graphical user interface that mixes MATLAB, Simulink and xilinx system generator that is an extension of Simulink, consisting of a library called "blocks xilinx", and explores important aspects interested to hardware implementation. Using xilinx system generator in video processing effectively reduces total design time of a system and improves the implementation time. The Hardware-in-the-loop or FPGA in the loop methodology is used in this paper. The objective of this work is to optimize and develop a real-time Hardware Co-Simulation of edge detection system with an input coming from a live video acquired from a digital camera, and outputs are displayed on a video display and verify the video results in real time. The system is implemented on Virtex-5 XUPV5-LX110T FPGA, which provides minimum hardware resources, low power consumption, and high image quality in terms of improved picture signal to noise ratio (PSNR).

关键词： Video processing FPGA xilinx system generator Hardware architecture Edge detection

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Implementation of Dead Reckoning Solution on Zynq Target 18

Implementation of Dead Reckoning Solution on Zynq Target

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18th International Carpathian Control Conference (ICCC)

作者： Bouzid, Ahmed Vasarhelyi, Jozsef Univ Miskolc Dept Automat & Infocommun Miskolc Hungary

ISBN: (纸本)9781509048625

In the framework of designing a system for the estimation of the position of moving objects, this work treats the case of Dead Reckoning solution. The algorithm uses exteroceptive data coming from two degree of freedom Microelectro mechanical system (MEMS) accelerometer to plot the trajectory of a mass point in a two-dimensional map. The mathematical model of the Dead Reckoning algorithm is based on some parameters that define the behavior of the moving object (which is assumed to be a point mass). Modeling and simulation has been done using MATLAB/SIMULINK environment in order to validate the algorithm of the solution. For the purpose of drawing the two-dimensional map describing the trajectory of the moving object, the positions are iteratively calculated using the previous calculated positions and velocities. The solution is implemented to get real time positions with a refresh rate of 10 Hz. It is also about implementing a Dead Reckoning algorithm on the FPGA part of a Zynq target (ZedBoard) and a personal computer to compare results obtained during hardware cosimulation process using system generator tool from xilinx.

关键词： Dead Reckoning Position estimation Embedded systems Inertial Navigation xilinx system generator Zynq

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4D-8PSK Trellis Coded Modulation: Implementation on xilinx Virtex-6 FPGA 2

4D-8PSK Trellis Coded Modulation: Implementation on Xilinx V...

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2nd IEEE International Workshop on Metrology for Aerospace

作者： Addabbo, P. Beltramonte, T. di Bisceglie, M. Galdi, C. Giangregorio, G. Ullo, S. L. Univ Sannio Piazza Roma 21 I-82100 Benevento Italy

ISBN: (纸本)9781479975693

A novel approach for the design and simulation of a new digital communication system is presented in this contribution. The specialized software xilinx system generator (SG), a toolbox working in the MATLAB/Simulink environment, is used. The approach has been applied to the design of a Four-Dimensional 8-PSK Trellis-Coded Modulation with 2.75 bits/channel-symbol spectral efficiency, whose system specifications correspond to the Consultative Committee for Space Data system (CCSDS) standard as reported in [1]. The proposed system has been implemented on a xilinx Virtex-6 ML605 Field Programmable Gate Array (FPGA) board [2].

关键词： Field programmable gate arrays trellis coded modulation Digital communication systems system specifications xilinx system generator consultative committee for space data systems 8-PSK

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