The co-occurrence matrix, a two-dimensional histogram of pairs of sample amplitudes, is explored as a representation of the digital speech waveform. Co-occurrence matrix representations support a hypothesis-testing ap...
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The co-occurrence matrix, a two-dimensional histogram of pairs of sample amplitudes, is explored as a representation of the digital speech waveform. Co-occurrence matrix representations support a hypothesis-testing approach to digital speech analysis. This approach is pursued in the formulation of a quantitative (chi-square) measure of sample amplitude dependence, based on co-occurrence matrices. This measure, which is higly sensitive to quasi-periodicity, is shown to lead to a good estimator of the pitch period of voiced speech. Co-occurrence matrix representations are employed in conjunction with pattern classification methods in experiments involving the voiced-unvoiced-silence analysis of speech, and in an experimental pitch extraction algorithm which is tested on continuous speech.
Some properties of two-band filter banks with rational rate changes (''rational filter banks'') are first reviewed. Focusing then on iterated rational filter banks, compactly supported limit functions ...
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Some properties of two-band filter banks with rational rate changes (''rational filter banks'') are first reviewed. Focusing then on iterated rational filter banks, compactly supported limit functions are obtained, in the same manner as previously done for dyadic schemes, allowing a characterization of such filter banks. These functions are carefully studied and the properties they share with the dyadic case are highlighted. They are experimentally observed to verify a ''shift property'' (strictly verified in the dyadic case) up to an error which can be made arbitrarily small when their regularity increases. In this case, the high-pass outputs of an iterated filter bank can be very close to samples of a discrete wavelet transform with the same rational dilation factor. Straightforward extension of the formalism of multiresolution analysis is also made. Finally, it is shown that if one is ready to put up with the loss of the shift property, rational iterated filter banks can be used in the same manner as if they were dyadic filter banks, with the advantage that rational dilation factors can be chosen closer to 1.
We present a robust, efficient algorithm for combinational test generation using a reduction to satisfiability (SAT), The algorithm, Test Generation Using Satisfiability (TEGUS), solves a simplified test set character...
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We present a robust, efficient algorithm for combinational test generation using a reduction to satisfiability (SAT), The algorithm, Test Generation Using Satisfiability (TEGUS), solves a simplified test set characteristic equation using straightforward but powerful greedy heuristics, ordering the variables using depth-first search and selecting a variable from the next unsatisfied clause at each branching point, For difficult faults, the computation of global implications is iterated, which finds more implications than previous approaches and subsumes structural heuristics such as unique sensitization. Without random tests or fault simulation, TEGUS completes on every fault in the ISCAS networks, demonstrating its robustness, and is ten times faster for those networks which have been completed by previous algorithms, Our implementation of TEGUS can be used as a base line for comparing test generation algorithms;we present comparisons with 45 recently published algorithms. TEGUS combines the advantages of the elegant organization of SAT-based algorithms with the efficiency of structural algorithms.
The channel-tracking mode performance of the front-end (FE) processors which were developed in a companion paper [1] is determined through approximate analysis and computer simulation, A general model for the FE proce...
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The channel-tracking mode performance of the front-end (FE) processors which were developed in a companion paper [1] is determined through approximate analysis and computer simulation, A general model for the FE processing, which encompasses these representative FE's, is assumed, Previous analysis techniques are extended to include the effects of FE processing. The specific system analyzed consists of a Rayleigh-fading, diffuse multipath channel with several data pulse shapes considered, An adaptive maximum likelihood sequence estimation (MLSE) algorithm based on the per-survivor processing (PSP) technique is analyzed and compared to an algorithm based on correct symbol feedback. The results show that significant performance degradation is suffered when suboptimal FE processing is used, The limitations of the results and the models used are discussed.
Hypercubes, meshes and tori are well known interconnection networks for parallel computers. The sets of edges in those graphs can be partitioned to dimensions. It is wen known that the hypercube can be extended by add...
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Hypercubes, meshes and tori are well known interconnection networks for parallel computers. The sets of edges in those graphs can be partitioned to dimensions. It is wen known that the hypercube can be extended by adding a wildcard dimension resulting in a folded hypercube that has better fault-tolerant and communication capabilities. First we prove that the folded hypercube is optimal in the sense that only a single wildcard dimension can be added to the hypercube. We then investigate the idea of adding wildcard dimensions to d-dimensional meshes and tori. Using techniques from error correcting codes we construct d-dimensional meshes and tori with wildcard dimensions. Finally, we show how these constructions can be used to tolerate edge and node faults in mesh and torus networks.
We investigate the problem of decoding digital data when soft decisions are constrained to take on values from a finite set. We propose a physically reasonable objective function for selecting the desired assignment o...
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We investigate the problem of decoding digital data when soft decisions are constrained to take on values from a finite set. We propose a physically reasonable objective function for selecting the desired assignment of metrics to the received analog signals, We develop a search algorithm for designing a table-look-up that is used by the decoder to select the appropriate intermediate metrics and show that an optimum solution exists, We provide a number of illuminating examples to elucidate our ideas and work out in detail some practical cases.
Dynamic equations are developed in nonrecursive symbolic form for chain-structured robotic manipulators with compliant links. A program is developed in REDUCE to automate the symbolic expansion of these equations for ...
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Dynamic equations are developed in nonrecursive symbolic form for chain-structured robotic manipulators with compliant links. A program is developed in REDUCE to automate the symbolic expansion of these equations for any given chain-structured manipulator. The symbolic nonrecursive form of the dynamic model is particularly suitable for controller synthesis and real-time control implementations.
We develop a systolic design-rule checker (SDRC) for rectilinear geometries. This SDRC reports all width and spacing violations. It is expected to result in a significant speed up of the design-rule check phase of chi...
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We develop a systolic design-rule checker (SDRC) for rectilinear geometries. This SDRC reports all width and spacing violations. It is expected to result in a significant speed up of the design-rule check phase of chip design.
We describe the application of the PVL algorithm to the small-signal analysis of circuits, including sensitivity computations. The PVL algorithm is based on the efficient computation of the Pade approximation of the n...
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We describe the application of the PVL algorithm to the small-signal analysis of circuits, including sensitivity computations. The PVL algorithm is based on the efficient computation of the Pade approximation of the network transfer function via the Lanczos process, The numerical stability of the algorithm permits the computation of the Pade approximation to any accuracy over a certain frequency range, We extend the algorithm to compute sensitivities of network transfer functions, their poles, and their zeros, with respect to arbitrary circuit parameters, with minimal additional computational cost, We demonstrate the implementation of our algorithm on circuit examples.
A classification of the objectives and types of parallel processing gives the context of the prinicipal subjects of this paper. A compiler and machine organization which are capable of detecting opportunities for para...
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A classification of the objectives and types of parallel processing gives the context of the prinicipal subjects of this paper. A compiler and machine organization which are capable of detecting opportunities for parallel processing in algebraic expressions and executing these by multiple processing units operating concurrently are described. The compiler algorithm, based on a tree structure of algebraic expressions, translates the expression into an object program containing concurrency groups of instructions. Within each such group. all of the instructions can be executed at the same time. The machine organization (described in a schematic way) includes a simple control for executing the object program by allocating instructions to processors within a group and interlocking advance to the next group until execution of the current group is completed.
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