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Adaptive control in roll-forward recovery for extreme scale multigrid

INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS 2019年第5期33卷 817-837页

作者： Huber, Markus Ruede, Ulrich Wohlmuth, Barbara Tech Univ Munich Bolzmannstr 3 D-85748 Munich Germany Friedrich Alexander Univ Nurnberg Erlangen Erlangen Germany CERFACS Parallel Algorithms Project Toulouse France

With the increasing number of compute components, failures in future exa-scale computer systems are expected to become more frequent. This motivates the study of novel resilience techniques. Here, we extend a recently proposed algorithm-based recovery method for multigrid iterations by introducing an adaptive control. After a fault, the healthy part of the system continues the iterative solution process, while the solution in the faulty domain is reconstructed by an asynchronous online recovery. The computations in both the faulty and the healthy subdomains must be coordinated in a sensitive way, in particular, both under- and over-solving must be avoided. Both of these waste computational resources and will therefore increase the overall time-to-solution. To control the local recovery and guarantee an optimal recoupling, we introduce a stopping criterion based on a mathematical error estimator. It involves hierarchically weighted sums of residuals within the context of uniformly refined meshes and is well-suited in the context of parallel high-performance computing. The recoupling process is steered by local contributions of the error estimator before the fault. Failure scenarios when solving up to 6.9 x 10(11) unknowns on more than 245,766 parallel processes will be reported on a state-of-the-art peta-scale supercomputer demonstrating the robustness of the method.

关键词： algorithm-based fault tolerance high-performance computing multigrid methods error estimator adaptive recovery

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Correcting DFT Codes with a Modified Berlekamp-Massey algorithm and Kalman Recursive Syndrome Extension

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IEEE TRANSACTIONS ON COMPUTERS 2014年第1期63卷 196-203页

作者： Redinbo, G. Robert Univ Calif Davis Dept Elect & Comp Engn Davis CA 95616 USA

Real number block codes derived from the discrete Fourier transform (DFT) are corrected by coupling a very modified Berlekamp-Massey (BM) algorithm with a syndrome extension process. The modified BM algorithm determines recursively the locations of any large errors whose number is within the capability of the DFT code. It evolves a connection polynomial which is changed when a discrepancy is above a threshold which is adjusted during each iteration. The large error locations are repositioned to exact location indices to combat low-level noise effects. The syndromes are extended using the refined connection polynomial taps. Alternately, enhanced extension recursions based on Kalman syndrome extensions are developed and simulated.

关键词： algorithm-based fault tolerance discrete Fourier transform codes Berlekamp-Massey algorithm Kalman estimation syndrome extensions

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fault-TOLERANT VLSI SYSTEMS

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PROCEEDINGS OF THE IEEE 1993年第5期81卷 745-758页

作者： PEERCY, M BANERJEE, P Coordinated Sci. Lab. Illinois Univ. Urbana IL

This paper examines the wide variety of fault tolerance techniques applied to VLSI technology. We provide a brief synopsis of fault models at the device, gate, and function levels. Then, we introduce the basic methods available to the designer of fault tolerance measures by surveying redundancy techniques. The majority of this paper discusses fault detection, which is the discovery of a fault before it delivers errant data to the rest of the system. We examine techniques of fault detection that use space, time, and information redundancies. Along with these redundancy measures, we also investigate algorithm-based fault tolerance in VLSI components. After discussing large-scale processor-level implementations of fault detection, we describe fault tolerance in automated VLSI production systems. After our treatment of the detection of errors and faults, we examine the other areas of fault tolerance in VLSI: reconfiguration of the system and recovery of system operation. We look into the issues involved in reconfiguration after discovery of a fault in fabrication or in operation. Our time here is spent generally in VLSI arrays. We conclude our discussion of fault tolerance in VLSI with an overview of the on-chip recovery capabilities of a VLSI microprocessor.

关键词： VLSI VLSI systems algorithm-based fault tolerance automated VLSI production systems circuit reliability error detection fault detection fault models fault tolerance techniques fault tolerant computing microprocessor microprocessor chips reconfiguration redundancy redundancy techniques system recovery

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FT-PBLAS: PBLAS-based fault-Tolerant Linear Algebra Computation on High-performance Computing Systems

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IEEE ACCESS 2020年 8卷 42674-42688页

作者： Zhu, Yanchao Liu, Yi Zhang, Guozhen Beihang Univ Sch Comp Sci & Engn Sino German Joint Software Inst Beijing 100191 Peoples R China Beihang Univ Beijing Key Lab Network Technol Beijing 100191 Peoples R China

As high-performance computing (HPC) systems have scaled up, resilience has become a great challenge. To guarantee resilience, various kinds of hardware and software techniques have been proposed. However, among popular software fault-tolerant techniques, both the checkpoint-restart approach and the replication technique face challenges of scalability in the era of peta- and exa-scale systems due to their numerous processes. In this situation, algorithm-based approaches, or algorithm-based fault tolerance (ABFT) mechanisms, have become attractive because they are efficient and lightweight. Although the ABFT technique is algorithm-dependent, it is possible to implement it at a low level (e.g., in libraries for basic numerical algorithms) and make it application-independent. However, previous ABFT approaches have mainly aimed at achieving fault tolerance in integrated circuits (ICs) or at the architecture level and are therefore not suitable for HPC systems;e.g., they use checksums of rows and columns of matrices rather than checksums of blocks to detect errors. Furthermore, they cannot deal with errors caused by node failure, which are common in current HPC systems. To solve these problems, this paper proposes FT-PBLAS, a PBLAS-based library for fault-tolerant parallel linear algebra computations that can be regarded as a fault-tolerant version of the parallel basic linear algebra subprograms (PBLAS), because it provides a series of fault-tolerant versions of interfaces in PBLAS. To support the underlying error detection and recovery mechanisms in the library, we propose a block-checksum approach for non-fatal errors and a scheme for addressing node failure, respectively. We evaluate two fault-tolerant mechanisms and FT-PBLAS on HPC systems, and the experimental results demonstrate the performance of our library.

关键词： fault tolerance fault tolerant systems Libraries Linear algebra Computational modeling Software Integrated circuits algorithm-based fault tolerance HPC systems node failure matrix multiplication linear algebra computations

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EVALUATION AND COMPARISON OF fault-TOLERANT SOFTWARE TECHNIQUES

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IEEE TRANSACTIONS ON RELIABILITY 1993年第2期42卷 190-204页

作者： HUDAK, J SUH, BH SIEWIOREK, D SEGALL, Z CARNEGIE MELLON UNIV DEPT ELECT & COMP ENGNPITTSBURGHPA 15213

Various fault-tolerant software techniques have been proposed in order to meet the reliability requirements of critical systems. This paper evaluates 4 implementations of fault-tolerant software techniques with respect to hardware and design faults. Project participants were divided into 4 groups, each of which developed fault-tolerant software based on a common specification. Each group applied one of the following techniques: n-version programming, recovery block, concurrent error-detection, and algorithm-based fault tolerance. Independent testing and modeling groups within the project then thoroughly analyzed the fault-tolerant software. Using fault-injection tools, the testing group subjected the fault-tolerant software to simulated design and hardware faults. Simulated design-faults included control flow, array boundary, computational, and post/pre increment/decrement software mutations. Simulated hardware-faults included code and data corruption. Data collected from the fault-injection experiment were then mapped into a discrete-time Markov model developed by the modeling group. based on this model, the effectiveness of each implementation of the fault-tolerant software technique with respect to availability, correctness, and time to failure given an error, is contrasted with measured data. Finally, the model is analyzed with respect to additional figures of merit identified during the modeling process, and the techniques are ranked using an application taxonomy.

关键词： fault-TOLERANT SOFTWARE N-VERSION PROGRAMMING RECOVERY BLOCK CONCURRENT ERROR-DETECTION algorithm-based fault tolerance MARKOV MODEL fault-INJECTION TESTING

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On-line soft error correction in matrix-matrix multiplication

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JOURNAL OF COMPUTATIONAL SCIENCE 2013年第6期4卷 465-472页

作者： Wu, Panruo Ding, Chong Chen, Longxiang Davies, Teresa Karlsson, Christer Chen, Zizhong Colorado Sch Mines Dept Elect Engn & Comp Sci Golden CO 80401 USA Univ Calif Riverside Dept Comp Sci & Engn Riverside CA 92521 USA

Soft errors are one-time events that corrupt the state of a computing system but not its overall functionality. Soft errors normally do not interrupt the execution of the affected program, but the affected computation results cannot be trusted any more. A well known technique to correct soft errors in matrix-matrix multiplication is algorithm-based fault tolerance (ABFT). While ABET achieves much better efficiency than triple modular redundancy (TMR) - a traditional general technique to correct soft errors, both ABFT and TMR detect errors off-line after the computation is finished. This paper extends the traditional ABET technique from off-line to on-line so that soft errors in matrix-matrix multiplication can be detected in the middle of the computation during the program execution and higher efficiency can be achieved by correcting the corrupted computations in a timely manner. Experimental results demonstrate that the proposed technique can correct one error every ten seconds with negligible (i.e. less than 1%) performance penalty over the ATLAS dgemm (). (C) 2013 Elsevier B.V. All rights reserved.

关键词： algorithm-based fault tolerance Matrix multiplication fault tolerant linear algebra On-line algorithm based fault tolerance

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fault-tolerant computation in groups and semigroups: applications to automata, dynamic systems and Petri nets

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JOURNAL OF THE FRANKLIN INSTITUTE-ENGINEERING AND APPLIED MATHEMATICS 2002年第4-5期339卷 387-430页

作者： Hadjicostis, CN Verghese, GC Univ Illinois Dept Elect & Comp Engn Urbana IL 61801 USA

The traditional approach to fault-tolerant computation has been via modular hardware redundancy. Although universal and simple, modular redundancy is inherently expensive and inefficient. By exploiting particular structural features of a computational architecture or an algorithm, arithmetic codes and recently developed algorithm-based fault tolerance (ABFT) techniques manage to introduce "analytical redundancy" and offer more efficient fault coverage at the cost of narrower applicability and harder design. In this paper, we extend a variety of results and constructive procedures that were developed in previous work for computations that take place in an abelian group to a more general setting that considers computations in semigroups. We demonstrate possible encodings for semigroup operations of interest and use our extension to design concurrent error detection and correction schemes for group and semigroup machines. The method provides insight regarding the role of decomposition in fault-tolerant algebraic machines and results in a general, hardware-independent characterization of concurrent error detection and correction in finite semiautomata. We also demonstrate that by extending this approach to other dynamic systems, with specific hardware implementations and failure modes, we can systematically obtain fault-tolerant architectures. More specifically, we apply these techniques to linear time-invariant dynamic systems and Petri net models of discrete event systems. (C) 2002 The Franklin Institute. Published by Elsevier Science Ltd. All rights reserved.

关键词： fault-tolerant computing group machines semigroup machines concurrent error detection concurrent error correction algorithm-based fault tolerance automata linear time-invariant dynamic systems Petri nets

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Decoding real-number convolutional codes: Change detection, Kalman estimation

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IEEE TRANSACTIONS ON INFORMATION THEORY 1997年第6期43卷 1864-1876页

作者： Redinbo, GR Department of Electrical and Computer Engineering University of California Davis CA USA

Convolutional codes which employ real-number symbols are difficult to decode because of the size of the alphabet and the numerical and roundoff noise inherent in arithmetic operations. Such codes find applications in both channel coding for communication systems and in fault-tolerance support for signal processing subsystems. A new method for error correction, based on optimum mean-square recursive Kalman estimation techniques incorporates time-varying models for the system and associated disruptive noise sources. The underlying common model for communications and fault tolerance applications assumes the system operates nominally with low levels of channel or numerical and roundoff noise, occasionally experiencing temporarily larger noise statistics. A time-varying Kalman estimation structure which uses single-step and fixed-lag smoothing predictors can correct errors to within the nominal low-noise levels. Correction actions may be activated only when larger activity is detected, so methods for detecting possible error situations are developed. However, misdetection is not a serious problem because the Kalman correction methods only track significant errors in the data. Two activity detection techniques are examined;one is based on likelihood ratio tests while another uses clipped samples and binary pattern matching. Several examples showing simulated mean-square error performance and decoded waveforms from error injection experiments are presented.

关键词： algorithm-based fault tolerance change detection channel coding fault tolerance Kalman recursive estimation mean-square error correction real-number codes time-varying error models

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Extending backward error assertions to tolerance of large errors in floating point computations

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IEEE TRANSACTIONS ON COMPUTERS 1997年第4期46卷 505-510页

作者： Fitzpatrick, P NATL UNIV IRELAND UNIV COLL CORK NATL MICROELECT RES CTR CORK IRELAND

The use of backward error assertions combined with iterative refinement has been suggested for the correction of small fault induced errors in the floating point solution of linear systems. We extend this to the corre... 详细信息

关键词： fault tolerance algorithm-based fault tolerance backward error assertions floating point computation

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Graceful degradation in algorithm-based fault tolerant multiprocessor systems

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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 1997年第2期8卷 137-153页

作者： Yajnik, S Jha, NK PRINCETON UNIV DEPT ELECT ENGN PRINCETON NJ 08544 USA

algorithm-based fault tolerance (ABFT) is a technique which improves the reliability of a multiprocessor system by providing concurrent error detection and fault location capability to it. It encodes data at the system level and modifies the algorithm to operate on the encoded data in order to expose both transient and permanent faults in any processor. Work done till now in this area takes care of only the fault detection and location part of the problem. However, if spare processors are not available, then after a faulty processor has been located, the work initially assigned to it has to be mapped to some nonfaulty processors in the system in such a way that the fault tolerance capability of the system is still maintained with as small a degradation in performance as possible. In this paper, we propose an integrated deterministic solution to the above problem which combines concurrent error detection and fault location with graceful degradation. There exists no previous deterministic ABFT method for the design of general t-fault locating systems, even for the case of t = 1. We propose a general method for designing one-fault locating/s-fault detecting systems. We use an extended model for representing ABFT systems. This model considers the processors computing the checks to be a part of the ABFT system, so that faults in the check_computing processors can also be detected and located using a simple diagnosis algorithm, and the checks can be mapped to other nonfaulty processors in the system.

关键词： algorithm-based fault tolerance concurrent error detection concurrent fault location fault diagnosis graceful degradation transient faults

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