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analog computing for Nonlinear Shock Tube PDE Models: Test and Measurement of CMOS Chip

IEEE ACCESS 2025年 13卷 2862-2875页

作者： Malavipathirana, Hasantha Mandal, Soumyajit Udayanga, Nilan Wang, Yingying Hariharan, S. I. Madanayake, Arjuna Florida Int Univ Dept Elect & Comp Engn Miami FL 33174 USA Brookhaven Natl Lab Instrumentat Div Upton NY 11973 USA Ocius Technol Akron OH 44311 USA

Long left ignored by the digital computing industry since its heyday in 1940's, analog computing is today making a comeback as Moore's Law slows down. analog CMOS has power efficiency advantages over digital CMOS for low-precision applications in edge computing, scientific computing, and artificial intelligence/machine learning (AI/ML) verticals. Driven by observed non-trivial improvements in performance over digital processors while solving linear partial differential equations (PDEs), this paper presents experimental results and analysis from a single-chip CMOS analog computer for solving nonlinear PDEs. The chip integrates a 15-point fully-parallel spatially-discrete time-continuous (SDTC) finite difference time-domain (FDTD) solver for acoustic shock wave equations with radiation boundary conditions. The design was realized in TSMC 180 nm CMOS technology. It has an active area of 7.38 mm $\times 4.64$ mm and consumes 936 mW while delivering an equivalent FDTD temporal update rate of 80 MHz and an analog bandwidth of 2 MHz. The paper discusses the challenges and associated design trade-offs in realizing such high-performance CMOS analog computers, including sensitivity to process, voltage, and temperature (PVT) variations, sensitivity to bias and voltage regulation, errors associated with noise, difficulties with calibration;it also outlines possible approaches for mitigating these challenges.

关键词： Gain Delays Computer architecture Time-domain analysis Finite difference methods Acoustics Accuracy Mathematical models Integrated circuit modeling Electric shock analog computing finite-difference time domain (FDTD) acceleration CMOS nonlinear partial differential equations (PDEs)

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Over-the-air multi-sensor inference with neural networks using memristor-based analog computing

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PHYSICAL COMMUNICATION 2025年 69卷

作者： Tegin, Busra Ali, Muhammad Atif Duman, Tolga M. Bilkent Univ Dept Elect & Elect Engn TR-06800 Ankara Turkiye

Deep neural networks provide reliable solutions for many classification and regression tasks;however, their application in real-time wireless systems with simple sensor networks is limited due to high energy consumption and significant bandwidth needs. This study proposes a multi-sensor wireless inference system with memristor-based analog computing. Given the sensors' limited computational capabilities, the features from the network's front end are transmitted to a central device where an L p-norm inspired approximation of the maximum operation is employed to achieve transformation-invariant features, enabling efficient over- the-air transmission. We also introduce a trainable over-the-air sensor fusion method based on L p-norm inspired combining function that customizes sensor fusion to match the network and sensor distribution characteristics, enhancing adaptability. To address the energy constraints of sensors, we utilize memristors, known for their energy-efficient in-memory computing, enabling analog-domain computations that reduce energy use and computational overhead in edge computing. This dual approach of memristors and L p-norm inspired sensor fusion fosters energy-efficient computational and transmission paradigms and serves as a practical energy-efficient solution with minimal performance loss.

关键词： Wireless inference Sensor fusion Multi-sensor network Transformation invariance Over-the-air Memristors analog computing Energy efficiency Lp-norm

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In Situ analog In-Memory computing Under Ionizing Radiation Exposure

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 2025年第4期72卷 1243-1251页

作者： Xiao, T. Patrick Siath, Maximilian Spear, Matthew Wilson, Donald Bennett, Christopher H. Feinberg, Ben Hughart, David R. Neuendank, Jereme Brown, William E. Barnaby, Hugh Agrawal, Vineet Puchner, Helmut Agarwal, Sapan Marinella, Matthew J. Sandia Natl Labs Albuquerque NM 87185 USA Arizona State Univ Sch Elect Comp & Energy Engn Tempe AZ 85287 USA Ellutions LLC Chandler AZ 85286 USA Infineon Technol San Jose CA 95037 USA Sandia Natl Labs Livermore CA 94550 USA

We experimentally performed in situ analog in-memory computing (IMC) under ionizing radiation, using a 40-nm silicon-oxide-nitride-oxide-silicon (SONOS) charge-trap memory array with peripheral circuits that support analog matrix-vector multiplication (MVM) operations. The SONOS array used analog MVMs to process the last layer of a convolutional neural network (CNN) for TinyImageNet image classification while being irradiated by gamma rays from a Co-60 source. We experimentally characterized how the following quantities were gradually degraded by increasing the total ionizing dose (TID), up to 3.2 Mrad(Si): neural network weights that were mapped to SONOS states, dot products that were computed by analog MVMs, and the resulting image classification accuracy of the neural network. Using multiscale modeling, we confirmed that the experimentally observed accuracy loss originates almost entirely from the state-dependent current shifts induced by ionizing radiation in the SONOS memory cells. Our experimentally validated model of radiation effects in SONOS analog computing can be used to guide the design of reliable space-grade analog IMC accelerators.

关键词： SONOS devices Convolutional neural networks Accuracy Neural networks Vectors Ionizing radiation In-memory computing Training Threshold voltage Logic gates analog computing charge-trap memory flash memory in-memory computing (IMC) ionizing radiation machine learning (ML) neural networks silicon-oxide-nitride-oxide-silicon (SONOS) total ionizing dose (TID)

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analog computing Using Reflective Plasmonic Metasurfaces

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NANO LETTERS 2015年第1期15卷 791-797页

作者： Pors, Anders Nielsen, Michael G. Bozhevolnyi, Sergey I. Univ Southern Denmark Dept Technol & Innovat DK-5230 Odense M Denmark

Motivated by the recent renewed interest in compact analog computing using light and metasurfaces (Silva, A. et al. Science 2014, 343, 160-163), we suggest a practical approach to its realization that involves reflective metasurfaces consisting of arrayed gold nanobricks atop a subwavelength-thin dielectric spacer and optically thick gold film, a configuration that supports gap-surface plasmon resonances. Using well-established numerical routines, we demonstrate that these metasurfaces enable independent control of the light phase and amplitude, and design differentiator and integrator metasurfaces featuring realistic system parameters. Proof-of-principle experiments are reported along with the successful realization of a high-quality poor-mans integrator metasurface operating at the wavelength of 800 nm.

关键词： Metasurfaces plasmonics analog computing metamaterials gap surface plasmons

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analog computing with Pocket Labs An approach for multidisciplinary first year student projects 4

Analog computing with Pocket Labs An approach for multidisci...

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4th Experiment@ International Conference (exp.at)

作者： Pester, A. Klinger, T. Carinthia Univ Appl Sci Engn & IT Villach Austria

This paper describes the experience in using pocket labs, in our case the NI myDAQ, also for interdisciplinary projects in engineering mathematics, electrical engineering and circuit design for first year students.

ISBN: (纸本)9781538608104

关键词： myDAQ analog computing mathematical modeling electrical engineering circuit design components

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A note on discreteness and virtuality in analog computing

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THEORETICAL COMPUTER SCIENCE 2007年第1-2期371卷 106-114页

作者： Trautteur, Giuseppe Tamburrini, Guglielmo Univ Naples Federico II Dipartimento Sci Fis I-80126 Naples Italy

The need for physically motivated discreteness and finiteness conditions emerges in models of both analog and digital computing that are genuinely concerned with physically realizable computational processes. This is brought out by a critical examination of notional analog superTuring devices which involve physically untenable idealizations about the perfect functioning of analog apparatuses and infinite precision of physical measurements. The capability for virtual behaviour, that is, the capability of interpreting, storing, transforming, creating the code, and thereby mimicking the behaviour of (Turing) machines, is used here to introduce a new dimension in the discussion of the analog-digital watershed. In the light of recent results on the analog simulation of digital computing, we examine the role of virtuality as a discriminating factor between these two species of computing, and immerse this problem in the context of natural computing. Is virtuality instantiated in parts of the natural world other than computer technology? This broad issue is examined in connection with the computational modelling of brain and mental information processing. (c) 2006 Elsevier B.V. All rights reserved.

关键词： analog computing virtual machine cognitive modelling

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Modeling and Simulation of Circuit-Level Nonidealities for an analog computing Design Approach With Application to EEG Feature Extraction

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2023年第1期42卷 229-242页

作者： Mirchandani, Nikita Zhang, Yuqing Abdelfattah, Safaa Onabajo, Marvin Shrivastava, Aatmesh Northeastern Univ Dept Elect & Comp Engn Boston MA 02115 USA

This article presents a design approach for the modeling and simulation of ultralow power (ULP) analog computing machine learning (ML) circuits for seizure detection using electroencephalography (EEG) signals in wearable health monitoring applications. In this article, we describe a new analog system modeling and simulation technique to associate power consumption, noise, linearity, and other critical performance parameters of analog circuits with the classification accuracy of a given ML network, which allows to realize a power and performance optimized analog ML hardware implementation based on diverse application-specific needs. We carried out circuit simulations to obtain nonidealities, which are then mathematically modeled for an accurate mapping. We have modeled noise, nonlinearity, resolution, and process variations such that the model can accurately obtain the classification accuracy of the analog computing-based seizure detection system. Noise has been modeled as an input-referred white noise that can be directly added at the input. Device process and temperature variations were modeled as random fluctuations in circuit parameters, such as gain and cut-off frequency. Nonlinearity was mathematically modeled as a power series. The combined system level model was then simulated for classification accuracy assessments. The design approach helps to optimize power and area during the development of tailored analog circuits for ML networks with the ability to potentially trade power and performance goals while still ensuring the required classification accuracy. The simulation technique also enables to determine target specifications for each circuit block in the analog computing hardware. This is achieved by developing the ML hardware model, and investigating the effect of circuit nonidealities on classification accuracy. Simulation of an analog computing EEG seizure detection block shows a classification accuracy of 91%. The proposed modeling approach will signi

关键词： analog computing feature extraction system modeling ultralow power (ULP) circuits

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Yield Methodology and Heater Process Variation in Phase Change Memory (PCM) Technology for analog computing

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IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING 2023年第3期36卷 327-331页

作者： Chan, Victor Gasasira, A. Pujari, R. Tseng, W. -T. Gordon, T. Southwick, R. Ok, I. Choi, S. Silvestre, C. Utomo, H. Brew, K. Philip, T. Burr, G. W. Saulnier, N. Teehan, S. Ahsan, I. IBM Res Albany NY 12203 USA State Univ New York Polytech Inst Albany NY 12203 USA IBM Res Almaden San Jose CA 95120 USA

We discuss inline electrical testing to monitor the baseline of analog computing hardware using Phase Change Memory (PCM) technology. Tightening the PCM resistance distribution is necessary to meet analog computation requirement. A new yield methodology is introduced. A study of heater process variation, which will affect the heater height and the PCM resistance, will be discussed.

关键词： Phase change memory yield analog computing

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FDSOI-Based analog computing for Ultra-Efficient Hamming Distance Similarity Calculation

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 2023年第7期70卷 2679-2688页

作者： Mema, Albi Thomann, Simon Genssler, Paul R. Amrouch, Hussam Univ Stuttgart Chair Semicond Test & Reliabil STAR D-70569 Stuttgart Germany Tech Univ Munich TUM Chair Processor Design D-80333 Munich Germany

computing the similarity between two binary strings is a frequently used operation in cryptography, machine learning, and other areas. The Hamming distance is a simple yet costly to compute similarity metric. A common way is to XOR both binary input strings and then count the number of 1s. Especially the latter popcount part is inefficient with purely digital circuits. In this paper, a novel analog circuit is proposed to compute the Hamming distance in an ultra-efficient way. Contrary to the major trend in the state of the art, no emerging technology is required. Instead, the unique feature of the mature FDSOI transistor technology is exploited for the first time to perform analog-based similarity calculation. Thanks to the additional back gate available in this technology, the transistor's threshold voltage can be modulated by more than 1. Through this key feature, an ultra-efficient analog computing is realized, replacing the inefficient digital popcount traditionally built from expensive adder tree structures. The design is evaluated with an FDSOI transistor model calibrated with industrial measurements. The energy-delay product is at least 24 smaller than purely digital implementations and the transistor count is reduced by over 2.6.

关键词： Silicon-on-insulator Logic gates Transistors Hamming distances Synapses Adders Threshold voltage FDSOI analog computing circuit design hamming distance

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The Next Generation of Deep Learning Hardware: analog computing

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PROCEEDINGS OF THE IEEE 2019年第1期107卷 108-122页

作者： Haensch, Wilfried Gokmen, Tayfun Puri, Ruchir IBM Res Yorktown Hts NY 10598 USA IBM Watson AI Yorktown Hts NY 10598 USA

Initially developed for gaming and 3-D rendering, graphics processing units (GPUs) were recognized to be a good fit to accelerate deep learning training. Its simple mathematical structure can easily be parallelized and can therefore take advantage of GPUs in a natural way. Further progress in compute efficiency for deep learning training can be made by exploiting the more random and approximate nature of deep learning work flows. In the digital space that means to trade off numerical precision for accuracy at the benefit of compute efficiency. It also opens the possibility to revisit analog computing, which is intrinsically noisy, to execute the matrix operations for deep learning in constant time on arrays of nonvolatile memories. To take full advantage of this in-memory compute paradigm, current nonvolatile memory materials are of limited use. A detailed analysis and design guidelines how these materials need to be reengineered for optimal performance in the deep learning space shows a strong deviation from the materials used in memory applications.

关键词： analog computing deep learning neural network neuromorphic computing nonvolatile memory synapse

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